MTS Network Silicon Design Verifier

Advanced Micro Devices, Inc.; Santa Clara (CA); On-site; USD 160,000 - 210,000; Full time

Job summary

Advanced Micro Devices, Inc. (AMD) is seeking a hands-on MTS Design Verification Engineer to lead verification of complex networking IP, subsystems, and SoCs. You will define verification strategy, develop scalable environments, and drive functional and performance verification to signoff.

The role requires expert SystemVerilog, UVM, and strong debugging skills across IP, subsystem, and SoC levels, with collaboration across RTL, firmware, and emulation teams.

Qualifications

• Bachelor’s degree in Electrical/Computer Engineering or related field; Master’s preferred

Responsibilities

• Develop verification architecture and scalable UVM-based testbenches for IP, subsystems, and SoC
• Verify networking and data-path functions (Ethernet, PCIe, DMA, AXI) with constrained-random test plans
• Own regression, triage, and debug to closure across RTL, testbench, and interfaces (PCIe/DDR/Ethernet)
• Mentor juniorDV engineers and contribute to verification methodology improvements
• Collaborate with RTL design, architecture, validation, and firmware teams to ensure high-quality deliverables

Skills

SystemVerilog

UVM

Python

Debugging

RTL

Networking protocols

Education

Bachelor’s Degree in Electrical/Computer Engineering

Master’s degree preferred

Tools

VCS

Verdi/DVE

Python

Job description

Advanced Micro Devices, Inc. (AMD) is seeking a hands-on MTS Design Verification Engineer to lead verification of complex networking IP, subsystems, and SoCs. You will define verification strategy, develop scalable environments, and drive functional and performance verification to signoff.

The role requires expert SystemVerilog, UVM, and strong debugging skills across IP, subsystem, and SoC levels, with collaboration across RTL, firmware, and emulation teams.