Mixed-Signal IP Verification Engineer

ALTEN; San Diego (CA); On-site; USD 100,000 - 140,000; Full time

Job summary

ALTEN is seeking a talented engineer to join Qualcomm's design verification team in San Diego, California. In this role, you will be responsible for verifying high-speed mixed-signal IP designs for products aimed at 5G, AI, IoT, and automotive applications.

Your responsibilities include defining and implementing test plans, developing testbenches, and working closely with design teams. The ideal candidate will hold a Master's or Bachelor's degree in Electrical Engineering and possess at least 2 years of relevant experience with ASIC design verification.

Qualifications

• At least 2 years of ASIC design verification or related work experience.
• Knowledge of a HVL methodology such as SystemVerilog/UVM.
• Experience with ASIC simulation/formal tools.

Responsibilities

• Define pre-silicon and post-silicon test plans based on design specs.
• Architect and develop the testbench using advanced verification methodology.
• Implement power-aware verification methodology in SV/UVM environment.
• Author assertions in SVA, develop test cases and coverage models.

Skills

SystemVerilog/UVM

ASIC design verification

Analog/mixed-signal simulation

Power-aware verification

Scripting (Python or Perl)

Education

Master's or Bachelor's degree in Electrical Engineering

Tools

VCS

Xcellium/NCsim

Modelsim/Questa

Job description

ALTEN is seeking a talented engineer to join Qualcomm's design verification team in San Diego, California. In this role, you will be responsible for verifying high-speed mixed-signal IP designs for products aimed at 5G, AI, IoT, and automotive applications.

Your responsibilities include defining and implementing test plans, developing testbenches, and working closely with design teams. The ideal candidate will hold a Master's or Bachelor's degree in Electrical Engineering and possess at least 2 years of relevant experience with ASIC design verification.