Memory Quality & Reliability Engineer — SRAM/RF Certification

Intel

Santa Clara (CA)

Hybrid

USD 156,000 - 220,000

Full time

6 days ago
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Job summary

Intel in the United States (California) seeks an experienced Memory Quality and Reliability Engineer to lead post-silicon memory characterization, certification, and technology readiness for SRAM, RF, and fuse arrays. You will develop certification methodologies, analyze large silicon datasets, and build predictive models to guide certification decisions and PDK releases.

Collaborating with design, device, PDE, and yield teams, you will transform silicon learning into actionable improvements,

Qualifications

  • Ph.D. in Electrical Engineering, Computer Engineering, Physics or related field with 2+ years of semiconductor industry experience, or MS with 6+ years.
  • 2+ years hands-on memory testing experience.
  • 2+ years experience performing quantitative analysis of large datasets using statistical methods.

Responsibilities

  • Plan and execute SRAM, RF, and/or Fuse technology certification to support milestones.
  • Define certification methodologies, test strategies, and readiness criteria for memory arrays.
  • Drive memory array characterization across multiple operating conditions to evaluate Vmin, Vmax, aging behavior, variability, and design margins.
  • Analyze silicon characterization data to identify performance gaps, failure signatures, systematic trends, and technology risks.
  • Develop, validate, and maintain silicon-based Vccmin and Vmax predictive models used for technology certification, PDK releases, and product guidance.
  • Perform silicon-to-simulation (Sil2Sim) correlation assessments and drive understanding of discrepancies between measured silicon behavior and design predictions.
  • Collaborate with Yield, Design, Device Engineering, PDE, Defect Rel and FIFA teams to define root-cause hypotheses, resolution paths, and technology improvement recommendations on meeting technology commit for memory offers.
  • Generate certification reports, readiness assessments, and risk projections that support technology deployment decisions.
  • Present technical findings and recommendations to engineering leadership, program teams, and customers.
  • Drive continuous improvement of memory certification methodologies, modeling approaches, characterization flows, and data analytics infrastructure.
  • Provide technical mentorship and leadership within a highly collaborative cross-functional environment.

Skills

Memory testing
Statistical analysis
Data analysis

Education

Ph.D. in Electrical Engineering, Computer Engineering, Physics or related discipline with 2+ years of semiconductor industry experience
M.S. in Electrical Engineering, Computer Engineering, Physics, Materials Science, or related discipline with 6+ years of semiconductor industry experience

Tools

JMP
Python

Job description

Intel in the United States (California) seeks an experienced Memory Quality and Reliability Engineer to lead post-silicon memory characterization, certification, and technology readiness for SRAM, RF, and fuse arrays. You will develop certification methodologies, analyze large silicon datasets, and build predictive models to guide certification decisions and PDK releases.

Collaborating with design, device, PDE, and yield teams, you will transform silicon learning into actionable improvements,

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