Memory Quality & Reliability Engineer — Post-Silicon Certification

Intel

Folsom (CA)

Hybrid

USD 156,000 - 220,000

Full time

14 days+

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Job summary

Intel in California (Folsom) seeks an experienced Memory Quality and Reliability Engineer to drive post-silicon memory characterization, certification, and technology readiness activities for SRAM, RF, and fuse arrays.

You will collaborate with design, device, PDE, and yield teams to transform silicon learning into certification decisions and actionable technology improvements for PDK releases and product guidance.

Qualifications

  • Ph.D. or M.S. with semiconductor industry experience as stated in minimum qualifications.
  • 2+ years of hands-on memory testing experience.
  • 2+ years of quantitative analysis of large memory/semiconductor datasets using DOE/SPC/regression/hypothesis testing or multivariate analysis.
  • 2+ years of using JMP and Python for data analysis, statistical modeling, or data visualization.

Responsibilities

  • Plan and execute SRAM, RF, and/or Fuse technology certification.
  • Define and maintain certification methodologies, criteria, test strategies, and readiness requirements for memory array.
  • Analyze silicon characterization data to identify performance gaps and technology risks.
  • Develop silicon-based Vccmin and Vmax predictive models for certification and PDK releases.
  • Perform silicon-to-simulation correlation assessments and drive understanding of discrepancies.

Skills

Memory testing
Data analysis
Python
JMP
Statistical methods

Education

Ph.D. in Electrical Engineering, Computer Engineering, Physics or related
M.S. in Electrical Engineering, Computer Engineering, Physics, Materials Science, or related

Tools

Python
JMP

Job description

Intel in California (Folsom) seeks an experienced Memory Quality and Reliability Engineer to drive post-silicon memory characterization, certification, and technology readiness activities for SRAM, RF, and fuse arrays.

You will collaborate with design, device, PDE, and yield teams to transform silicon learning into certification decisions and actionable technology improvements for PDK releases and product guidance.

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