Memory Layout Engineer – Cadence Virtuoso, DRC/LVS

1000 Micron Technology, Inc.; Boise (ID); On-site; USD 80,000 - 120,000; Full time

Job summary

1000 Micron Technology, Inc. is seeking a Layout Engineer based in Boise, Idaho. This position involves building block-level layouts in Cadence Virtuoso while ensuring compliance with DRC, LVS, density, and reliability standards. The ideal candidate should have strong hands-on design abilities and experience working closely with global design teams.

Micron offers benefits aimed at health, peace of mind, and future preparation. Enjoy a robust paid time-off program and an equal opportunity workplace.

Qualifications

• Experience performing physical layout using Cadence Virtuoso or similar tools.
• Familiarity with DRC, LVS, physical verification, and reliability checks.
• Ability to plan, document, and review layout goals with cross-site teams.

Responsibilities

• Build block-level layouts in Cadence Virtuoso including floorplanning, placement, routing, and optimization.
• Ensure DRC, LVS, density, and reliability compliance.
• Support parasitic extraction, post-layout verification, and ECO activities.

Skills

Physical layout experience

Experience with Cadence Virtuoso

Familiarity with DRC and LVS

Strong communication skills

Job description

1000 Micron Technology, Inc. is seeking a Layout Engineer based in Boise, Idaho. This position involves building block-level layouts in Cadence Virtuoso while ensuring compliance with DRC, LVS, density, and reliability standards. The ideal candidate should have strong hands-on design abilities and experience working closely with global design teams.

Micron offers benefits aimed at health, peace of mind, and future preparation. Enjoy a robust paid time-off program and an equal opportunity workplace.