Memory IC Layout & Mask Design Engineer

Micron Technology, Inc.; Boise (ID); Hybrid; USD 110,000 - 150,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Paid time-off and holidays

Job summary

Micron Technology, Inc. designs and implements physical layouts for advanced memory circuits used in memory products.

You will translate schematics into manufacturable layouts, create transistor, resistor, capacitor, and interconnect layouts, and ensure adherence to process rules and schedule commitments. You will perform floor planning, top-level die area estimation, and robust PDN design while collaborating with analog, digital, and process teams to optimize for manufacturability, reliability,

Qualifications

• Device physics and material characteristics relevant to chip design.
• Experience translating schematics into manufacturable layouts with DRC/LVS.
• Familiarity with SEM and thermodynamics impacting leakage.

Responsibilities

• Design physical layouts for digital, analog, and mixed-signal circuits.
• Perform floor planning, area estimation, and optimization.
• Execute routing, power bus design, and robust PDN solutions.

Skills

Device physics

Chip design performance

Electron microscopy (SEM)

Thermodynamics and leakage

Education

Bachelor’s degree in Electrical Engineering, Computer Engineering, Material Engineering, or related field

Job description

Micron Technology, Inc. designs and implements physical layouts for advanced memory circuits used in memory products.

You will translate schematics into manufacturable layouts, create transistor, resistor, capacitor, and interconnect layouts, and ensure adherence to process rules and schedule commitments. You will perform floor planning, top-level die area estimation, and robust PDN design while collaborating with analog, digital, and process teams to optimize for manufacturability, reliability,