Layout/Mask Design Engineer

Micron Technology, Inc.; Boise (ID); On-site; USD 110,000 - 170,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid time-off

Paid holidays

Job summary

Micron Technology, Inc. in Boise, Idaho, seeks a Layout/Mask Design Engineer to translate schematics into manufacturable layouts for memory products, ensuring compliance with process rules and performance targets.

You will create physical layouts of transistors, resistors, capacitors, and interconnects, and perform floorplanning for efficient die area use. The role involves routing, PDN design, LVS/DRC verification, and close collaboration with analog, digital, and process teams to optimize

Qualifications

• Requires knowledge of device physics and material characteristics affecting chip performance.
• Experience with electron microscopy (SEM) and thermodynamics related to leakage.
• Strong understanding of layout principles and design rules for manufacturability.

Responsibilities

• Design and implement physical layouts for digital, analog, and mixed-signal circuits in memory products.
• Translate schematics into manufacturable layouts that meet process rules, performance targets, and schedules.
• Create layouts of transistors, resistors, capacitors, and interconnects; perform block-level floorplanning and die area estimation.
• Perform routing, power bus design, and robust PDN development to ensure electrical performance and reliability.
• Verify LVS and DRC; ensure compliance with foundry process design rules; collaborate with cross-functional teams.
• Maintain layout documentation and participate in layout and design reviews; drive continuous improvement for manufacturability.

Skills

Device physics

Material characteristics

SEM analysis

Leakage thermodynamics

Education

Bachelor's degree in EE/CE/Materials Eng

Job description

JR113593 Layout/Mask Design Engineer

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Design and implement physical layouts for advanced digital, analog, and mixed-signal circuits used in the development of memory products. Responsible for translating schematics into high quality, manufacturable layouts that meet process rules, performance targets, and schedule commitments, while collaborating closely with cross functional engineering teams. Create physical layouts of transistors, resistors, capacitors, and interconnect structures for digital, analog, and mixed-signal circuits. Perform block-level floor planning, including layout area estimation and optimization. Develop IC top-level floorplans and provide accurate total die area estimates. Execute routing, power bus design, and creation of robust PDN (Power Domain Network) solutions to ensure optimal electrical performance, reliability, and scalability. Ensure layouts comply with foundry process design rules and verify layout-versus-schematic (LVS) and design rule checks (DRC). Apply recommended layout, verification techniques, tools, and design flows to deliver high-quality designs on schedule. Work closely with analog/mixed-signal and digital design engineers to ensure proper layout implementation, including critical matching and symmetry requirements. Collaborate with Design Engineering, Product Engineering, Process Integration, Probe, and Assembly teams to proactively optimize designs for manufacturability, cost, quality, reliability, and time-to-market. Create and maintain layout-related documentation and actively participate in layout and design reviews. Support continuous improvement of layout methodologies, flows, and best practices to enhance overall product performance and customer satisfaction.

Employer qualifications

Employer will accept a Bachelor’s degree in Electrical Engineering, Computer Engineering, Material Engineering, or related field.

Position requires:

1. Device physics;
2. Material characteristics affecting chip design performance;
3. Electron microscopy (SEM);
4. Thermodynamics impacting leakage.

Job Profile(s):

Semiconductor Design Engineer3

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth.

Benefits

• Micron offers a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.
• Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.
• Additionally, Micron benefits include a robust paid time-off program and paid holidays.

For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc

Equal Opportunity

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.