Memory Architecture Lead – Non-Volatile NAND Design

Micron; San Jose (CA); On-site; USD 176,000 - 322,000; Full time

Benefits offered by this job

Medical, dental, vision plans

Paid time off

Paid holidays

Equity

Job summary

Micron Technology, Inc. in San Jose, CA is seeking a Design Architecture Lead in Non-Volatile Engineering for NAND Flash design.

You will drive pathfinding and execution of advanced memory architectures, collaborating with marketing, test, process, and product engineering to ensure manufacturability and performance. You will oversee full chip verification activities, define simulation plans, mentor teams, and contribute to post-silicon validation and reliability analysis, while staying at the

Qualifications

• 15+ years of proven experience in non-volatile memory design.
• Degree/Major: BS, MS or Ph.D in Electrical Engineering (or related fields).
• Broad knowledge and experience in NAND Flash memory design is required.
• Knowledge of circuit simulators such as XA, hspice and/or hsim/finesim.
• Understanding of reliability issues (CHC, NBTI, stress, snapback, EM, IR).
• Familiarity with StarRC/Calibre parasitic extraction flow and debugging extraction issues.

Responsibilities

• Innovate and architect memory/storage solutions for high performance and energy efficiency.
• Collaborate with cross-functional teams to evaluate features and architecture.
• Oversee full chip verification including planning, tracking, and criteria setting.
• Mentor teams and drive AI tool adoption to improve design workflows.
• Contribute to post-silicon validation and root-cause analysis.

Skills

NAND Flash design

Memory architecture

Analog & mixed-signal

Circuit simulation

Leadership

Education

BS in Electrical Engineering

MS in Electrical Engineering

PhD in Electrical Engineering

Tools

XA

HSPICE

HSIM

StarRC/Calibre

Job description

Micron Technology, Inc. in San Jose, CA is seeking a Design Architecture Lead in Non-Volatile Engineering for NAND Flash design.

You will drive pathfinding and execution of advanced memory architectures, collaborating with marketing, test, process, and product engineering to ensure manufacturability and performance. You will oversee full chip verification activities, define simulation plans, mentor teams, and contribute to post-silicon validation and reliability analysis, while staying at the