NVM Design Architect Lead - High-Performance Memory

Micron Technology; San Jose (CA); On-site; USD 176,000 - 322,000; Full time

Benefits offered by this job

Medical plan

Dental plan

Vision plan

Paid time off

Job summary

Micron Technology, a world leader in memory and storage solutions, seeks a Design Architecture Lead for Non-Volatile Engineering NAND Flash design. Lead architecture, verification, and collaboration across Marketing, Probe, Assembly, Test, and Product Engineering to deliver best-in-class memory products.

You will define simulation plans, set pass/fail criteria, and participate in post-silicon validation and root-cause analysis. Expect a leadership role shaping future memory technologies.

Qualifications

• 15+ years of proven experience in non-volatile memory design.
• Broad knowledge of NAND Flash memory design at full chip level.
• Experience with circuit verification and reliability concepts.

Responsibilities

• Innovate and architect memory/storage solutions for high performance systems.
• Lead multi-functional features evaluation and architecture decisions.
• Support design, layout, and optimization of Memory/Logic circuits.
• Coordinate with Marketing, Probe, Assembly, Test, and Product Engineering groups.
• Oversee full chip verification planning, tracking, and criteria setting.
• Mentor design teams and stay current with technology trends.

Skills

Memory design

Non-volatile memory

NAND Flash design

Chip verification

Team leadership

Simulation

Electrical engineering

Problem solving

Mentorship

AI tools adoption

Education

BS/MS/PhD in Electrical Engineering

Tools

XA

HSPICE

HSIM/FINESIM

Job description

Micron Technology, a world leader in memory and storage solutions, seeks a Design Architecture Lead for Non-Volatile Engineering NAND Flash design. Lead architecture, verification, and collaboration across Marketing, Probe, Assembly, Test, and Product Engineering to deliver best-in-class memory products.

You will define simulation plans, set pass/fail criteria, and participate in post-silicon validation and root-cause analysis. Expect a leadership role shaping future memory technologies.