Memory Architect: Compute-In-Memory Silicon Innovator

Normal Computing Corp.; Mountain View (CA); On-site; USD 260,000 - 420,000; Full time

Job summary

Normal Computing is seeking a seasoned Memory Architect to lead the translation of radical memory concepts into silicon for AI inference workloads. You will shape the Compute-In-Memory system, coordinating with Silicon, Analog, and manufacturing partners to drive performance gains.

You will own design of memory arrays, PDK access, and the interface to external hosts, delivering 100–1000× improvements in AI inference performance as part of a cross-functional team in Mountain View.

Qualifications

• Substantial experience in memory architecture or circuit design in memory-centric companies.
• Memory array physics including 1T/3T/6T/8T SRAM cells, DRAM, retention and reliability.
• Hands-on memory tech with PDKs and tapeout of test chips.
• Fluency from SPICE-level to architecture-level models in Python/C++ for performance predictions.
• Experience with RTL and SystemVerilog for dataflow modeling and compute block specs.
• Experience with various memory interfaces (SERDES, PCIe, DDR5, LPDDR, HBM).
• Excellent written and spoken communication skills.

Responsibilities

• Define the memory architecture and floorplan enabling in-memory compute, including read/write paths and new memory primitives.
• Design local and global datapaths, segmented buses, and on-die fabrics for data movement between memory and logic.
• Own power grid, thermal budgets, reliability, ECC to maximize performance while maintaining yield.
• Own access to PDKs and design rules; drive tapeout plans from shuttle to test chips.
• Collaborate with analog engineers on primitive device libraries and write paths.
• Define interfaces between the memory product and external hosts (e.g., SERDES, PCIe, DDR5, HBM).
• Oversee SPICE/analytical models and validate performance/power/yield with ML workloads.

Skills

Memory architecture

Memory cell physics

Embedded memory test chips

Programming (Python/C/C++)

RTL/SystemVerilog

Memory interfaces

Communication skills

Job description

Normal Computing is seeking a seasoned Memory Architect to lead the translation of radical memory concepts into silicon for AI inference workloads. You will shape the Compute-In-Memory system, coordinating with Silicon, Analog, and manufacturing partners to drive performance gains.

You will own design of memory arrays, PDK access, and the interface to external hosts, delivering 100–1000× improvements in AI inference performance as part of a cross-functional team in Mountain View.