Principal AI Memory Architect

Conductor; San Jose (CA); On-site; USD 219,000 - 351,000; Full time

Benefits offered by this job

Medical/Dental/Vision/401k

4+ weeks paid time off

Fertility/adoption support

Job summary

Samsung Semiconductor in San Jose seeks a Hands-on Principal Engineer to own memory footprint and inference performance for next-generation AI models. Define tiered memory architectures from HBM to NVMe, translating model behavior into hardware and software requirements.

You will lead architecture reviews, mentor engineers, and represent the company in CTO-to-CTO discussions, requiring deep knowledge of MoE, transformer internals, and production memory management across stacks like vLLM,

Qualifications

• First-principles understanding of transformer-class model internals.
• Working knowledge of MoE model behavior and routing.
• Experience profiling memory bottlenecks in production serving.

Responsibilities

• Define memory architecture requirements for tiered inference at fleet scale.
• Lead architecture reviews and cross-team design sessions.
• Mentor senior engineers and contribute to technical narratives for customers.

Skills

Transformer internals

MoE model behavior

Memory‑system design

Performance engineering

Education

BS in Computer/Electrical/CS

MS in Computer/Electrical/CS

Tools

vLLM PagedAttention

SGLang HiCache

TensorRT-LLM

llama.cpp

Job description

Samsung Semiconductor in San Jose seeks a Hands-on Principal Engineer to own memory footprint and inference performance for next-generation AI models. Define tiered memory architectures from HBM to NVMe, translating model behavior into hardware and software requirements.

You will lead architecture reviews, mentor engineers, and represent the company in CTO-to-CTO discussions, requiring deep knowledge of MoE, transformer internals, and production memory management across stacks like vLLM,