AI Memory Architect & Microarchitecture Engineer

Micron Technology, Inc.; Folsom (CA); On-site; USD 177,000 - 309,000; Full time

Job summary

Micron Technology, Inc. in California is seeking a Member of Technical Staff to advance AI-optimized memory architectures for next-generation workloads.

You will translate architecture requirements into scalable microarchitectures and silicon implementations, optimizing for performance, power, and area while collaborating with cross-functional teams. Strong design and data-driven decision-making are essential.

Qualifications

• Strong experience in digital design and microarchitecture development.
• Solid understanding of computer and memory system architecture with ability to reason about SoC-level behavior and tradeoffs.
• Experience with synthesis, and early PPA estimation and optimization.
• Experience in one or more high-level programming languages (e.g., C/C++, Python) and hardware description languages (e.g., SystemVerilog).
• Ability to influence others through deeply technical, data-driven analysis.

Responsibilities

• Translate architecture requirements into scalable microarchitectures from concept through implementation.
• Design, implement, and review SystemVerilog designs for memory systems architectures.
• Perform synthesis and early analysis to estimate and optimize area, power, and timing.
• Compose and maintain clear microarchitecture documentation that aligns design intent across teams.
• Drive technical decisions by evaluating tradeoffs across microarchitecture and implementation constraints.

Skills

Digital design

Microarchitecture development

SoC‑level architecture

SystemVerilog

C/C++ / Python

Education

Masters or PhD in CS/CE/EE or equivalent

Tools

SystemVerilog

C/C++

Python

RTL synthesis

Job description

Micron Technology, Inc. in California is seeking a Member of Technical Staff to advance AI-optimized memory architectures for next-generation workloads.

You will translate architecture requirements into scalable microarchitectures and silicon implementations, optimizing for performance, power, and area while collaborating with cross-functional teams. Strong design and data-driven decision-making are essential.