Lead Wireless SoC Architect - Equity and Tapeout Ready

Silicon Labs; Austin (TX); On-site; USD 161,000 - 298,000; Full time

Benefits offered by this job

Great medical

401k with match

RSUs

Life/AD&D and disability

Flexible PTO

Tuition reimbursement

Job summary

Silicon Labs is seeking a Chip Lead to provide technical leadership across architecture, design, integration, and production of wireless SoCs. You will translate requirements into a cohesive architecture, drive key decisions, and coordinate global teams from definition to tapeout, with a focus on low‑power, highly integrated solutions.

The role demands deep expertise in SoC architecture, microarchitecture, IP integration, verification, and physical implementation, plus strong leadership to guide

Qualifications

• 12+ years of experience in Electrical or Computer Engineering.
• Hands-on experience in architecture, micro‑architecture, and digital design processes.
• Knowledge of high‑speed interfaces (USB, PCIe, Ethernet, Mobile DDR, Quad/Octa‑SPI).
• Knowledge of peripherals (SDIO, UART, I2S, I2C, PWM, CAN).
• Knowledge of design signoff flows (Lint, CDC, Formal Verification, Synthesis, STA Timing).
• Knowledge of DFT (Scan, ATPG, MBIST).
• Knowledge of low power design methodologies (gating, power gating, DVFS).
• Knowledge of hardware accelerators and SoC integration.

Responsibilities

• Lead the technical development and execution of complex wireless SoCs from product definition through design, silicon validation, and production.
• Define and plan SoC development milestones and review requirements with stakeholders.
• Provide input on architectural decisions, tradeoffs, and IP reuse.
• Identify risks and cross‑functional dependencies early in the cycle.
• Coordinate design execution across global teams and drive tapeout readiness.
• Provide hands‑on technical leadership during verification, physical implementation, and integration.

Skills

SOC architecture

Digital design

RISC-V/ARM

Verilog/SystemVerilog

Low power design

DFT

Architectural decisions

Team leadership

Scripting (Perl/Python)

Education

Bachelors or Masters in Electrical/Computer Engineering

Tools

Verilog

SystemVerilog

Perl

Python

Tcl

Shell

Job description

Silicon Labs is seeking a Chip Lead to provide technical leadership across architecture, design, integration, and production of wireless SoCs. You will translate requirements into a cohesive architecture, drive key decisions, and coordinate global teams from definition to tapeout, with a focus on low‑power, highly integrated solutions.

The role demands deep expertise in SoC architecture, microarchitecture, IP integration, verification, and physical implementation, plus strong leadership to guide