Lead Verification Engineer II

NXP Semiconductors; Austin (TX); On-site; USD 110,000 - 140,000; Full time

Job summary

NXP Semiconductors in Austin seeks a Verification Engineer II to lead verification efforts and mentor a small team. You will define verification plans, build testbenches, and develop drivers, monitors, and scoreboards using UVM VIPs. Strong VLSI verification background and debugging skills are essential.

You will apply formal methods, coverage models, and advanced debugging techniques to ensure robust RTL, with exposure to AI/LLM-based efficiency improvements as a plus.

Qualifications

• BSEE with 2–5 years semiconductor industry experience or higher
• MSEE with 3+ years experience or PhD with 1+ year experience
• Strong Verilog/SystemVerilog and UVM/OVM background required

Responsibilities

• Define and execute verification plans
• Develop and implement verification testbenches
• Create testbench components like drivers, monitors, and scoreboards with UVM VIPs
• Develop directed and constrained-random stimulus
• Analyze RTL, coverage, and assertion results
• Develop functional coverage models and SystemVerilog assertions

Skills

Verilog/SystemVerilog

UVM/OVM

Debugging & analysis

Python scripting

Formal verification

Education

BSEE with 2–5 years semiconductor experience

MSEE with 3+ years

PhD with 1+ year

Tools

OVM/UVM toolchains

SVA tools

Formal verification tools

Job description

NXP Semiconductors in Austin seeks a Verification Engineer II to lead verification efforts and mentor a small team. You will define verification plans, build testbenches, and develop drivers, monitors, and scoreboards using UVM VIPs. Strong VLSI verification background and debugging skills are essential.

You will apply formal methods, coverage models, and advanced debugging techniques to ensure robust RTL, with exposure to AI/LLM-based efficiency improvements as a plus.