Lead STA Engineer for Ultra-Low-Power SoC

Oho Group

Austin (TX)

On-site

USD 140,000 - 210,000

Full time

2 days ago
Be an early applicant

Get more replies from employers

Send a job-specific resume in minutes.

Job summary

Oho Group is seeking a Lead Static Timing Analysis Engineer to join our growing hardware engineering team. You will lead timing convergence and methodology for our next-generation ultra-low-power general-purpose processor, collaborating across RTL, DFT, IP, physical design, and post-silicon teams.

This role offers an early-stage opportunity to shape products from initial design through tape-out and volume production, with options to base in San Francisco or Austin.

Qualifications

  • MS in Electrical Engineering with 5+ years of industry experience, or PhD with 3+ years.
  • Signoffs/tape-outs at 12nm or below.
  • Strong experience with Cadence, Synopsys, or Mentor EDA tools.
  • Hands-on experience with high-frequency, low-power timing convergence.
  • Deep knowledge of STA, constraints, exceptions, corners, voltage definitions, and timing margins.
  • Strong TCL, shell, and Python scripting skills.
  • Understanding of low-power implementation and power/timing tradeoffs.

Responsibilities

  • Develop STA flows and methodology using Cadence Tempus or Synopsys PrimeTime for advanced FinFET technologies.
  • Own timing convergence for IP, subsystem, and SoC blocks.
  • Define timing corners, margins, extraction methodology, and signoff correlation.
  • Develop slew, glitch/noise, and custom timing checks.
  • Define and drive SDC constraints with RTL, DFT, and IP teams.

Skills

TCL scripting
Python scripting
Low-power design
Timing convergence
STA expertise

Education

M.S. in Electrical Eng. or Ph.D.

Tools

Cadence tools
Synopsys tools
Mentor EDA tools

Job description

Oho Group is seeking a Lead Static Timing Analysis Engineer to join our growing hardware engineering team. You will lead timing convergence and methodology for our next-generation ultra-low-power general-purpose processor, collaborating across RTL, DFT, IP, physical design, and post-silicon teams.

This role offers an early-stage opportunity to shape products from initial design through tape-out and volume production, with options to base in San Francisco or Austin.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Lead Physical Design Engineer - STA
Lead Physical Design Engineer - STA

Oho Group • Austin (TX)

On-site
USD 140,000 - 210,000
Senior Timing Lead Engineer – Ultra-Low-Power SoC
Senior Timing Lead Engineer – Ultra-Low-Power SoC

Efficient Computer • San Jose (CA)

On-site
USD 200,000 - 250,000
401K match
Company-paid benefits
Equity program
+2
Senior STA Engineer — Low-Power SoC Timing Lead
Senior STA Engineer — Low-Power SoC Timing Lead

Efficient Computer • Pittsburgh

On-site
USD 200,000 - 250,000
Equity compensation
Comprehensive benefits
401K match
Senior STA Engineer: SoC Timing, Clocking & Power
Senior STA Engineer: SoC Timing, Clocking & Power

Intel Corporation • Phoenix (AZ), Northern (KY)

Hybrid
USD 164,000 - 269,000
Hybrid work model
Health benefits
Stock bonuses
+2
Lead STA Engineer
Lead STA Engineer

Efficient Computer • Pittsburgh

On-site
USD 200,000 - 250,000
Equity compensation
Comprehensive benefits
401K match
SoC Timing & Signoff Engineer - Full-Chip STA Expert
SoC Timing & Signoff Engineer - Full-Chip STA Expert

Google • Jasper (AL)

On-site
USD 138,000 - 197,000
Full-Chip STA Engineer: SoC Timing & Signoff Lead
Full-Chip STA Engineer: SoC Timing & Signoff Lead

Google • United States

On-site
USD 163,000 - 236,000
Equity
Benefits
Full-Chip STA Engineer: SoC Timing & Signoff Leader
Full-Chip STA Engineer: SoC Timing & Signoff Leader

Google Inc. • Mountain View (CA)

On-site
USD 138,000 - 197,000
Equity awards
Bonus target
Relocation assistance
Lead STA Engineer for SoC Timing & IP Delivery
Lead STA Engineer for SoC Timing & IP Delivery

Apple Inc. • Austin (TX)

On-site
USD 90,000 - 120,000
Senior SoC STA Engineer
Senior SoC STA Engineer

Aleron • San Diego (CA)

On-site
USD 120,000 - 160,000
Supportive team-driven culture
Career growth opportunities
People-first environment