Lead SoC Verification Engineer

Advanced Micro Devices, Inc.; San Jose (CA); On-site; USD 100,000 - 130,000; Full time

Job summary

Advanced Micro Devices, Inc. is seeking a Verification Engineer to lead the verification of Network on Chip IPs and Subsystems. This role involves architecting and developing verification environments to ensure the functional correctness of designs, requiring expertise in SystemVerilog and UVM.

The ideal candidate will have substantial experience in verifying complex digital designs, particularly in NoC architectures, and will work closely with global design teams to drive verification closure.

Qualifications

• Expertise in verification of complex digital designs, ideally including NoC architectures.
• Proficiency in constraint-random, coverage-driven, and formal verification (SVA).
• Strong analytical and collaborative skills for debugging and verification closure.

Responsibilities

• Lead verification of complex digital design blocks by understanding architecture and specifications.
• Create comprehensive verification test plans with architects and engineers.
• Design and document testbenches in System Verilog and UVM.

Skills

SystemVerilog

UVM

ASIC/SoC verification methodologies

debugging complex issues

coverage-driven verification

Education

Bachelors or Masters degree in Computer Engineering or Electrical Engineering

Tools

Synopsys VCS

Cadence IES

Job description

Advanced Micro Devices, Inc. is seeking a Verification Engineer to lead the verification of Network on Chip IPs and Subsystems. This role involves architecting and developing verification environments to ensure the functional correctness of designs, requiring expertise in SystemVerilog and UVM.

The ideal candidate will have substantial experience in verifying complex digital designs, particularly in NoC architectures, and will work closely with global design teams to drive verification closure.