Senior Design Verification Engineer - Networking & SoC

Advanced Micro Devices; Santa Clara (CA); On-site; USD 120,000 - 160,000; Full time

Job summary

Advanced Micro Devices is looking for a skilled Design Verification Engineer to join the Network Technologies Solutions Group. This role involves developing UVM-based testbench architectures and leading verification efforts on complex ASIC designs. The ideal candidate should have expertise in SystemVerilog, strong debugging skills, and the ability to collaborate with cross-functional teams in a fast-paced environment.

Founded on a culture of innovation and collaboration, AMD aims to create extraordinary computing experiences through advanced technologies. The position is based in Santa Clara, CA.

Qualifications

• Experience with verification methodology improvements.
• Strong analytical and problem-solving abilities.
• Ability to lead verification tasks independently.

Responsibilities

• Develop robust UVM-based testbench architectures.
• Own execution of verification plans and debug issues.
• Collaborate with design, validation, and firmware teams.

Skills

SystemVerilog

UVM

Debugging skills

Scripting (Python, Tcl)

Knowledge of PCIe/DDR/Ethernet

Education

Bachelor’s Degree in Electrical/Computer Engineering

Master’s Preferred

Tools

VCS

Verdi/DVE

Job description

Advanced Micro Devices is looking for a skilled Design Verification Engineer to join the Network Technologies Solutions Group. This role involves developing UVM-based testbench architectures and leading verification efforts on complex ASIC designs. The ideal candidate should have expertise in SystemVerilog, strong debugging skills, and the ability to collaborate with cross-functional teams in a fast-paced environment.

Founded on a culture of innovation and collaboration, AMD aims to create extraordinary computing experiences through advanced technologies. The position is based in Santa Clara, CA.