Lead SerDes Design & Validation Engineer

Apple Inc.; San Diego (CA); Hybrid; USD 123,000 - 214,000; Full time

Benefits offered by this job

Medical and dental coverage

Retirement benefits

Stock program / RSU awards

Relocation assistance

Tuition reimbursement

Job summary

Apple Inc. is seeking a SerDes Design and Validation Engineer to lead system validation of high-performance SerDes IP.

The role involves designing and validating analog and mixed-signal blocks, including receivers, transmitters, bias generators, clocks, and DFT test strategies, with a strong emphasis on testability and production readiness. You will partner with design and test teams, drive lab validation, and tackle complex bring-up challenges across PCIe, USB, DP, and MPHY interfaces in a

Qualifications

• Bachelor's degree required.
• Experience with high-speed SerDes; PCIe/USB/DP familiarity preferred.
• Proven track record in analog mixed-signal design and validation.

Responsibilities

• Own SerDes system bring-up, validation and debugging.
• Collaborate with design teams to define DFT needs and testability improvements.
• Contribute to mixed-signal verification and system bring-up activities.

Skills

SerDes Design

Analog Mixed-Signal

LMS Adaptive Loops

Lab Debugging

Scripting Automation

PCIe

DFE/CTLE

Firmware Integration

AI/ML for Silicon

High-Speed SerDes Knowledge

Education

Bachelor's degree

Job description

Apple Inc. is seeking a SerDes Design and Validation Engineer to lead system validation of high-performance SerDes IP.

The role involves designing and validating analog and mixed-signal blocks, including receivers, transmitters, bias generators, clocks, and DFT test strategies, with a strong emphasis on testability and production readiness. You will partner with design and test teams, drive lab validation, and tackle complex bring-up challenges across PCIe, USB, DP, and MPHY interfaces in a