Lead SerDes Microarchitecture Engineer

Apple Inc.

Beaverton (OR)

On-site

USD 180,000 - 240,000

Full time

14 days+
Application generator

Stand out for this role — generate a tailored resume and cover letter in about a minute.

Get past ATS filters

Job summary

Apple Inc. is seeking a self-motivated SERDES Micro Architect to drive the definition of next-generation analog mixed-signal IPs for Apple silicon, delivering breakthroughs in power and performance.

You will define microarchitecture, review firmware and circuits, verify performance, lead system bring-up debugging, and collaborate with silicon evaluation, design verification, and signal integrity teams to ensure robust designs. Experience in high-speed SERDES and mixed-signal modeling is required.

Qualifications

  • BS degree in technical discipline with minimum 10 years of relevant experience.

Responsibilities

  • You will define the Micro Architecture of analog mixed‑signal IPs with emphasis on SERDES design.
  • You will review firmware code, analog and digital circuits and will verify that the design meets performance requirements.
  • You will work with silicon evaluation and design verification teams to define expected behavior.
  • You would lead the debug effort in system bring up and factory test.
  • You will work with signal integrity engineers to determine system requirements.

Job description

Apple Inc. is seeking a self-motivated SERDES Micro Architect to drive the definition of next-generation analog mixed-signal IPs for Apple silicon, delivering breakthroughs in power and performance.

You will define microarchitecture, review firmware and circuits, verify performance, lead system bring-up debugging, and collaborate with silicon evaluation, design verification, and signal integrity teams to ensure robust designs. Experience in high-speed SERDES and mixed-signal modeling is required.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

SerDes Micro Architect - Lead High-Speed IP for Silicon
SerDes Micro Architect - Lead High-Speed IP for Silicon

Apple Inc. • Austin (TX)

On-site
USD 180,000 - 280,000
Lead SerDes Micro Architect for Next-Gen Silicon
Lead SerDes Micro Architect for Next-Gen Silicon

Apple Inc. • Irvine (CA)

On-site
USD 175,000 - 309,000
Stock plans
Education reimbursement
Relocation assistance
+1
Senior SERDES Micro Architect — High-Speed Analog IP
Senior SERDES Micro Architect — High-Speed Analog IP

Apple Inc. • San Diego (CA)

On-site
USD 175,000 - 309,000
Senior SerDes Micro Architect — High-Speed IP Innovator
Senior SerDes Micro Architect — High-Speed IP Innovator

Apple Inc. • Cupertino (CA)

On-site
USD 184,700 - 324,800
Employee stock programs
Discretionary bonuses or commissions
Relocation assistance
+2
Senior SERDES Micro Architect – High-Speed IP Design
Senior SERDES Micro Architect – High-Speed IP Design

Apple Inc. • Waltham (MA)

On-site
USD 166,000 - 292,000
Stock programs
RSUs
Employee stock purchase plan
+3
SerDes Micro Architect
SerDes Micro Architect

Apple Inc. • Beaverton (OR)

On-site
USD 180,000 - 240,000
High-Speed SerDes Analog Design Engineer
High-Speed SerDes Analog Design Engineer

Apple Inc. • Austin (TX)

On-site
USD 120,000 - 180,000
High-Speed SerDes Circuit Design Engineer
High-Speed SerDes Circuit Design Engineer

Apple Inc. • Beaverton (OR)

On-site
USD 140,000 - 210,000
SerDes Micro Architect
SerDes Micro Architect

Apple Inc. • Austin (TX)

On-site
USD 180,000 - 280,000
High-Speed SerDes Designer for Next-Gen IP
High-Speed SerDes Designer for Next-Gen IP

Apple Inc. • San Diego (CA)

On-site
USD 122,700 - 214,300
Relocation assistance
Educational reimbursement
Employee stock programs
+1