Lead MTS Applications Engineer - Hybrid I2C/I3C & DDR5 Validation

Rambus.com

San Jose (CA)

Híbrido

USD 117 000 - 168 000

Tempo integral

14 dias+

Uma candidatura completa num minuto

Currículo e carta de apresentação personalizados, prontos a enviar.

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Vantagens oferecidas por esta oferta de emprego

Base salary
Bonus
Equity
401(k) matching
Employee stock purchase plan
Medical and dental benefits
Time-off program
Gym membership

Resumo da oferta

Rambus, a premier chip and silicon IP provider, seeks a Lead MTSApplication Engineer to join the Memory Interface team in San Jose, CA. This full-time role involves validating DDR5 enablement devices and developing bench automation scripts, with emphasis on I2C/I3C protocols and post-silicon support.

The position offers a hybrid work model with on-site and remote days, and a compensation package including base salary, bonus, equity, and benefits.

Qualificações

  • B.S. or M.S. in Electrical Engineering or Computer Engineering.
  • 5+ years of post-silicon digital ASIC bench validation.
  • Experience with lab automation in Python.
  • Experience working with I2C/I3C protocols.
  • Knowledge of Power Electronics is a bonus.
  • New graduates with digital design/validation or power electronics background are welcome to apply.

Responsabilidades

  • Bench characterization and validation of I2C/I3C protocols.
  • Developing Python scripts for bench automation.
  • Support customers in understanding and resolving their issues.
  • Provide post silicon bring-up support, interface with design, operation, and development.

Conhecimentos

I2C/I3C protocols
Python scripting
Post-silicon ASIC validation
Lab automation

Formação académica

B.S./M.S. in Electrical or Computer Engineering

Descrição da oferta de emprego

Rambus, a premier chip and silicon IP provider, seeks a Lead MTSApplication Engineer to join the Memory Interface team in San Jose, CA. This full-time role involves validating DDR5 enablement devices and developing bench automation scripts, with emphasis on I2C/I3C protocols and post-silicon support.

The position offers a hybrid work model with on-site and remote days, and a compensation package including base salary, bonus, equity, and benefits.

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