Senior Memory Validation Engineering Lead

Rambus.com; San Jose (CA); Hybrid; USD 162,000 - 300,000; Full time

Benefits offered by this job

Competitive compensation package

Equity / stock purchase plan

401(k) with matching

Medical and dental benefits

Time-off program

Gym membership

Job summary

Rambus, a premier chip and silicon IP provider, seeks a Validation Manager for its Memory Interface Chip unit in the US. The role involves leading validation of memory buffer chips, coordinating cross-functional teams, and driving bench validation and lab automation efforts.

Ideal candidates will have extensive DDR4/5 experience, high-speed signaling knowledge, and a track record in developing validation methodologies and project planning. This is a hybrid, full-time position based in the US.

Qualifications

• Bachelors or MS in Electrical Engineering with 10+ years of industry experience, incl. exposure to DDR4/5.
• Expertise with DDR4/5 and SERDES interfaces in high-speed memory.
• Experience with bench testing and knowledge of ATE or System Testing is a plus.
• Track record of growing organizations and developing validation methodologies.

Responsibilities

• Partner with cross-functional teams across all levels of the company.
• Develop and adapt validation methodologies to improve coverage and time-to-market.
• Collaborate with Design, Architecture, Verification, and Operations to deliver buffer chip products.
• Coordinate with external partners for test equipment, PCB assembly, and testing.
• Lead bench validation team to execute validation and characterization of memory buffer chips.
• Hands-on bench validation, characterization, and development of lab automation software.

Skills

Python programming

DDR4/DDR5

High-speed signaling

Bench testing

Education

Bachelors degree in Electrical Engineering

Tools

ATE

System Testing

Job description

Rambus, a premier chip and silicon IP provider, seeks a Validation Manager for its Memory Interface Chip unit in the US. The role involves leading validation of memory buffer chips, coordinating cross-functional teams, and driving bench validation and lab automation efforts.

Ideal candidates will have extensive DDR4/5 experience, high-speed signaling knowledge, and a track record in developing validation methodologies and project planning. This is a hybrid, full-time position based in the US.