Lead High-Speed I/O Architect: PCIe, CXL & UA Link

ARM; Austin (TX); Sur place; USD 250 000 - 338 000; Plein temps

Résumé du poste

Arm is seeking a High-Speed I/O Architect to design and define scalable on-chip interconnect architectures for diverse markets, delivering production-quality silicon with top-tier performance. You will collaborate with multi-functional teams to shape interconnect infrastructure that powers next-generation SoCs.

You will lead architecture engagements, define IP roadmaps, and work with software/firmware teams to optimize end-to-end solutions, ensuring robust performance and efficiency.

Qualifications

• Bachelor’s or Master’s degree in Electrical or Computer Engineering.
• 10+ years of semiconductor architecture or related roles.
• Experience with PCIe/CXL/UA Link and system coherency.

Responsabilités

• Architect high-speed interconnect subsystems (PCIe, CXL, UA Link) across silicon products.
• Define IP and subsystem roadmaps for high-speed I/O.
• Lead early architecture engagements with customers.
• Collaborate with performance, power, and physical design teams to optimize subsystems.
• Develop SoC architecture integrating Arm IP with high-speed I/O.
• Partner with software, firmware, and platform teams to optimize end-to-end solutions.
• Support workload analysis and performance modeling to guide decisions.

Connaissances

Coherency protocols

PCIe

CXL

UA Link

Leadership

Communication

Formation

Electrical or Computer Engineering

Description du poste

Arm is seeking a High-Speed I/O Architect to design and define scalable on-chip interconnect architectures for diverse markets, delivering production-quality silicon with top-tier performance. You will collaborate with multi-functional teams to shape interconnect infrastructure that powers next-generation SoCs.

You will lead architecture engagements, define IP roadmaps, and work with software/firmware teams to optimize end-to-end solutions, ensuring robust performance and efficiency.