Lead Digital Design Engineer - Automotive PMICs

Renesas Electronics

Chandler (AZ)

On-site

USD 120,000 - 180,000

Full time

2 days ago
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Benefits offered by this job

Competitive benefits package

Job summary

Renesas Electronics in Chandler, AZ is seeking an experienced IC design engineer to join the Power Management IC Team. You will design digital RTL, integrate at the top level, and collaborate with analog and verification teams to deliver robust pre-silicon PMIC solutions for automotive applications.

The role covers mixed-signal design flow, timing closure, and collaboration with physical design and applications teams.

Qualifications

  • 5–11+ years of digital design experience required.
  • Bachelor degree required; strong design fundamentals.
  • Experience with synthesizable design, timing constraints, and silicon checks.

Responsibilities

  • Design digital RTL that meets timing, area, and power specs.
  • Integrate at the top level and run block & top-level simulations.
  • Participate in mixed-signal design flow—architecture, constraints, synthesis, CDC.
  • Collaborate with P&R to meet timing, area, and power requirements.
  • Assist with top-level test-bench creation and gate-level simulations.
  • Work with analog and digital verification to craft pre-silicon test scenarios.
  • Develop AMS, SystemVerilog or Verilog-real models.
  • Develop detailed design documents and chip-level collateral.
  • Lead design reviews and complete checklists.

Skills

Digital RTL
Verilog/SystemVerilog
Timing analysis
AMS modeling
Design verification

Education

Bachelor's degree

Tools

Synopsys tools
Cadence tools
Mentor tools
Siemens tools

Job description

Renesas Electronics in Chandler, AZ is seeking an experienced IC design engineer to join the Power Management IC Team. You will design digital RTL, integrate at the top level, and collaborate with analog and verification teams to deliver robust pre-silicon PMIC solutions for automotive applications.

The role covers mixed-signal design flow, timing closure, and collaboration with physical design and applications teams.

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