Lead DFT & ATPG Product Engineer

Cadence; San Jose (CA); On-site; USD 115,000 - 213,000; Full time

Benefits offered by this job

401(k) plan with employer match

Employee stock purchase plan

Medical, dental and vision plans

Paid vacation and holidays

Job summary

Cadence Design Systems is seeking a highly motivated engineer to join the Modus Test Product Engineering team, focusing on Design For Test (DFT) and Automatic Test Pattern Generation (ATPG).

You will develop product specs, prototypes and work with R&D and Product Validation to implement and validate features, while assisting field teams and customers in deployment through flows and hands-on debugging.

Qualifications

• BS or MS in electrical engineering or related field as stated in the requirements.
• 6+ years of direct DFT experience or 4+ years with MS.
• Strong knowledge of ATPG, Scan, and iJTAG standards.

Responsibilities

• Develop features in DFT/ATPG and drive product validation.
• Collaborate with R&D, Product Validation and field teams.
• Create flows, presentations and hands-on debug guidance for customers.

Skills

DFT

ATPG

JTAG

IEEE 1687 (iJTAG)

MBIST

LBIST

EDA tools

Education

BS in Electrical Engineering or related field

MS in Electrical Engineering or related field (preferred)

Tools

DFT EDA tools

Job description

Cadence Design Systems is seeking a highly motivated engineer to join the Modus Test Product Engineering team, focusing on Design For Test (DFT) and Automatic Test Pattern Generation (ATPG).

You will develop product specs, prototypes and work with R&D and Product Validation to implement and validate features, while assisting field teams and customers in deployment through flows and hands-on debugging.