Lead ASIC/FPGA Verification Engineer

Fidus-d14aaef4; United States; On-site; CAD 170,000 - 226,000; Full time

Benefits offered by this job

Medical benefits

Dental benefits

Vision benefits

401(k) matching

Profit sharing

Job summary

Fidus is a global high-tech design firm headquartered in Ottawa with dedicated US-based operations. The Verification Designer owns block- and system-level verification of ASIC/FPGA designs for Fidus clients, leading end-to-end verification projects and building UVM, formal, and assertion-based environments.

You'll work across communications, aerospace, life sciences, automotive, semiconductors, and more, collaborating with cross-functional teams and sometimes engaging directly with clients on

Qualifications

• 8+ years of ASIC/FPGA verification with lead ownership.
• Strong SystemVerilog and UVM fluency, CRV techniques.
• Experience with coverage, assertions, and formal methods.
• Familiar with Ethernet, DDR/LPDDR, HBM, AXI, NoC, ARM subsystems.
• Experience with alternative environments (cocoTB, pyUVM, DPI-C) is a plus.
• Scripting in Python, Perl, or Tcl to automate tasks.
• Good debugging, problem-solving, and client-facing communication.

Responsibilities

• Own block- and system-level verification from test plan to closure.
• Design and implement UVM, formal, and assertion-based environments with CRV.
• Develop behavioral models and test cases to meet coverage goals.
• Debug and troubleshoot simulation/regression failures with teams.
• Automate verification tasks using scripting languages.
• Plan, execute, and report status on multiple verification activities as lead.
• Collaborate with external clients on verification strategy and support.

Skills

SystemVerilog & UVM

CRV techniques

Functional coverage

Assertions

Formal verification

Ethernet/Memory protocols

AXI/NoC/ARM subsystems

Scripting: Python/Perl/Tcl

Debugging

Client-facing

AI tooling awareness

Education

Bachelor's or Master's in Electrical/Computer Engineering or related

Tools

cocoTB

pyUVM

DPI-C

Job description

Fidus is a global high-tech design firm headquartered in Ottawa with dedicated US-based operations. The Verification Designer owns block- and system-level verification of ASIC/FPGA designs for Fidus clients, leading end-to-end verification projects and building UVM, formal, and assertion-based environments.

You'll work across communications, aerospace, life sciences, automotive, semiconductors, and more, collaborating with cross-functional teams and sometimes engaging directly with clients on