Analog Layout Engineer

TetraMem - Accelerate The World; San Jose (CA); On-site; USD 110,000 - 300,000; Full time

Job summary

A leading technology firm in Silicon Valley is seeking an experienced Analog Layout Engineer to design and implement cutting-edge analog and mixed-signal layouts for integrated circuits. The successful candidate will lead a team while collaborating with project managers and design engineers to meet strict project goals. With a solid background in deep submicron CMOS circuits and expertise in tools like Cadence Virtuoso, you'll be instrumental in delivering high-quality designs. The position offers a competitive salary range of $110,000 to $300,000 annually.

Qualifications

• 8+ years of relevant industry experience or equivalent.
• Experience with deep submicron CMOS circuits.
• Ability to manage multiple projects while paying attention to detail.

Responsibilities

• Lead a team of layout engineers.
• Collaborate with project managers and design engineers.
• Ensure designs meet project requirements.
• Review and approve final layout designs.

Skills

Analog and mixed-signal layout design

Project management

Cadence Virtuoso

Calibre DRC

Communication skills

Problem-solving

Education

B.S. in Electrical Engineering

Tools

Cadence Virtuoso

Calibre DRC

Job description

Job Summary

We are seeking an experienced Analog Layout Engineer to join our team. The Analog Layout Engineer will be responsible for designing and implementing analog and mixed‑signal layout designs for integrated circuits. This role requires a strong understanding of analog design principles and the ability to work closely with the design team to meet project goals.

Responsibilities

• Lead a team of layout engineers to produce complex analog and mixed‑signal blocks with high‑quality layout
• Collaborate with project managers and design engineers to understand project requirements
• Drive critical floor‑planning decisions and key layout methodology
• Ensure that all designs meet project requirements and adhere to design guidelines
• Review and approve final layout designs for production
• Stay up-to-date with industry trends and advancements in design software and techniques
• Attend project meetings, presentations, and other events as needed

Requirements

• B.S. EE and 8+ years of relevant industry experience or equivalent
• Experience in analog and mixed‑signal layout design of deep submicron CMOS circuits and recent experience on advanced nodes
• Proficiency in industry‑standard design software, such as Cadence Virtuoso, Calibre DRC, LVS
• Strong understanding of layout design principles and best practices
• Excellent communication, collaboration, and leadership skills
• Ability to manage multiple projects simultaneously while maintaining attention to detail
• Demonstrated ability to work independently and as part of a team
• Strong problem‑solving and decision‑making skills

Salary Range

$110,000 - $300,000 / year