Junior ASIC RTL Engineer - Cyber-Hardened IP Focus

AGL Technologies Inc.; City of Utica (NY); On-site; USD 70,000 - 100,000; Full time

Job summary

GL Technologies Inc. is seeking a junior ASIC Design Engineer to contribute to RTL implementation and back-end support in a fast-paced environment.

You will write clean VHDL, develop self-checking testbenches, and help optimize the design flow while collaborating with the verification and physical implementation teams. This entry-level role offers hands-on experience across front-end design and back-end workflows, with exposure to global foundry processes and standard EDA tools.

Qualifications

• US citizenship is required due to defense programs.
• Bachelor's or Master's degree in Electrical/Computer Engineering or related field.
• Strong VHDL knowledge and digital design fundamentals.
• Solid understanding of state machines and pipelining.
• Basic scripting in Tcl, Python, Bash or Perl to run automation scripts.
• Exposure to Synopsys, Cadence or Siemens tools desirable.

Responsibilities

• RTL implementation from specifications to synthesizable VHDL.
• Develop testbenches and scripts to validate designs pre-implementation.
• Identify and improve design flow processes and scripting infra.
• Support front-end verification with the verification team.
• Assist physical implementation, including timing constraints.
• Execute block-level synthesis and place-and-route using company scripts.

Skills

Digital design

Scripting basics

Education

Bachelor's or Master's Degree in Electrical Engineering or Computer Engineering

Tools

VHDL

EDA tools (Synthesis/Simulation)

Job description

GL Technologies Inc. is seeking a junior ASIC Design Engineer to contribute to RTL implementation and back-end support in a fast-paced environment.

You will write clean VHDL, develop self-checking testbenches, and help optimize the design flow while collaborating with the verification and physical implementation teams. This entry-level role offers hands-on experience across front-end design and back-end workflows, with exposure to global foundry processes and standard EDA tools.