Hybrid VLSI Logic Design Intern (SystemVerilog)

Hewlett Packard Enterprise

Fort Collins (CO)

Híbrido

USD 48 000 - 56 000

Tempo integral

há 11 horas
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Vantagens oferecidas por esta oferta de emprego

Hybrid work model

Resumo da oferta

Hewlett Packard Enterprise invites students to contribute to the Cray Slingshot design team, assisting with VLSI/RTL design, SVAs, and coverage analyses while developing automation scripts in Python and other languages.

The role emphasizes collaboration across DV/Arch/Design/FW teams, strong English communication, and the chance to work on high-performance compute projects in a hybrid environment.

Qualificações

  • Working toward a Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering or equivalent.
  • Self-driven with a positive, can-do attitude, and detail-oriented.
  • Experience with System Verilog for synthesis (ASIC or FPGA).
  • Proficiency in electrical engineering fundamentals, VLSI principles, digital logic, and computer architecture.
  • Experience in executive written and verbal communication skills; mastery in English.
  • Ability to work with cross functional teams (DV/Arch/Design/FW).

Responsabilidades

  • Assist with VLSI / RTL design using System Verilog.
  • Assist with creating System Verilog Assertions (SVAs) and use Formal Verification to prove design correctness.
  • Assist with writing coverage to measure stimulus quality and perform coverage analysis to identify verification holes.
  • Assist with creating scripts (Python, TCL, Perl) to improve design processes and efficiency.

Conhecimentos

System Verilog
VLSI principles
digital logic
computer architecture
English communication
cross functional collaboration
Python scripting

Formação académica

Bachelor's degree in Electrical Engineering or Computer Engineering or equivalent

Ferramentas

Python

Descrição da oferta de emprego

Hewlett Packard Enterprise invites students to contribute to the Cray Slingshot design team, assisting with VLSI/RTL design, SVAs, and coverage analyses while developing automation scripts in Python and other languages.

The role emphasizes collaboration across DV/Arch/Design/FW teams, strong English communication, and the chance to work on high-performance compute projects in a hybrid environment.

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