VLSI Logic Design Intern

Hewlett Packard Enterprise; Fort Collins (CO); Hybrid; USD 48,000 - 56,000; Full time

Benefits offered by this job

Hybrid work model

Job summary

Hewlett Packard Enterprise invites students to contribute to the Cray Slingshot design team, assisting with VLSI/RTL design, SVAs, and coverage analyses while developing automation scripts in Python and other languages.

The role emphasizes collaboration across DV/Arch/Design/FW teams, strong English communication, and the chance to work on high-performance compute projects in a hybrid environment.

Qualifications

• Working toward a Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering or equivalent.
• Self-driven with a positive, can-do attitude, and detail-oriented.
• Experience with System Verilog for synthesis (ASIC or FPGA).
• Proficiency in electrical engineering fundamentals, VLSI principles, digital logic, and computer architecture.
• Experience in executive written and verbal communication skills; mastery in English.
• Ability to work with cross functional teams (DV/Arch/Design/FW).

Responsibilities

• Assist with VLSI / RTL design using System Verilog.
• Assist with creating System Verilog Assertions (SVAs) and use Formal Verification to prove design correctness.
• Assist with writing coverage to measure stimulus quality and perform coverage analysis to identify verification holes.
• Assist with creating scripts (Python, TCL, Perl) to improve design processes and efficiency.

Skills

System Verilog

VLSI principles

digital logic

computer architecture

English communication

cross functional collaboration

Python scripting

Education

Bachelor's degree in Electrical Engineering or Computer Engineering or equivalent

Tools

Python

Job description

This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office.

Who We Are

Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE.

Job Description

Hewlett Packard Enterprise advances the way people live and work. We bring together the brightest minds to create breakthrough technology solutions, helping our customers make their mark on the world. The HPE Cray Slingshot team develops the backbone technologies that move data through the fastest supercomputers on the planet, and with this technology comes many interesting design challenges that push the limits of modern compute.

Job Responsibilities

• Assist with VLSI / RTL design using System Verilog.
• Assist with creating System Verilog Assertions (SVAs) and use Formal Verification to prove design correctness.
• Assist with writing coverage to measure stimulus quality and perform coverage analysis to identify verification holes.
• Assist with creating scripts (Python, TCL, Perl) to improve design processes and efficiency.

Experience And Skills Required

• Working toward a Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering or equivalent.
• Self-driven with a positive, can-do attitude, and detail-oriented.
• Experience with System Verilog for synthesis (ASIC or FPGA).
• Proficiency in electrical engineering fundamentals, VLSI principles, digital logic, and computer architecture.
• Experience in executive written and verbal communication skills; mastery in English.
• Ability to work with cross functional teams (DV/Arch/Design/FW).

Preferred Skills

• Understands the OSI model for layered networking stacks.
• Experience with Ethernet protocols, CPU or GPU systems, and high-speed peripherals.
• Understands the concepts of Formal Verification and design verification using UVM.
• A working knowledge of C/C++ or Python scripting.

Accessibility

HPE is committed to creating an inclusive and accessible workplace and encourages applications from all qualified individuals, including those with disabilities. If you believe you require accommodation during any stage of the application or interview process, please submit your request by completing our secure form linked here. Note: This option is reserved for applicants needing assistance/reasonable accommodation related to a disability.

What We Can Offer You

Health & Wellbeing

We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing.

Personal & Professional Development

We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have — whether you want to become a knowledge expert in your field or apply your skills to another division.

Unconditional Inclusion

We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good.

Let’s Stay Connected

Follow @HPECareers on Instagram to see the latest on people, culture and tech at HPE.

#unitedstates

#interns

Job

Administration

Job Level

N/A

The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level. – United States of America: Hourly Salary USD 35.00 - 41.00 in Colorado. The listed salary range reflects base salary. Variable incentives may also be offered.

Information about employee benefits offered in the US can be found at https://myhperewards.com/main/new-hire-enrollment.html

The estimated job application period closure is May 25 2027; this timeline is provided for transparency and internal planning purposes.

HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together.

Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.

HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories.