High-Speed SI/PI Engineer: DDR/PCIe & Backplane

Aivres; Fremont (CA); Hybrid; USD 110,000 - 140,000; Full time

Job summary

Aivres in Fremont, California is seeking a Signal Integrity Engineer to join our team. You will work on high-speed interconnect designs and SI/PI simulations for DDR, PCIe and other 25Gbps interfaces.

Responsibilities include developing layout guides, reviewing PCB designs, and conducting TDR/VNA-based debugging with hardware measurements to optimize performance. Strong teamwork and hands-on problem solving are essential.

Qualifications

• Electronics related major with 2+ years of relevant experience; SI experience preferred.
• Familiar with SI theory and high-speed bus protocols such as DDR and PCIe.
• Able to perform TDR, VNA testing and assist in high-speed PCB design docking, debugging and verification.

Responsibilities

• Design high-speed interconnect solutions and simulate SI/PI for buses like DDR, PCIe, 25Gbps and FC.
• Develop layout guides and review high-speed interface PCB designs; assist in backplane and motherboard PCB work.
• Develop high-speed signal debug methods using TDR and VNA, combine software simulation with hardware measurements.
• Monitor industry trends in SERDES, PCB materials, connectors, and output optimization solutions.

Skills

Signal integrity

High-speed PCB

DDR/PCIe knowledge

TDR/VNA testing

Communication & teamwork

Education

Electronics related major

Tools

TDR

VNA

Job description

Aivres in Fremont, California is seeking a Signal Integrity Engineer to join our team. You will work on high-speed interconnect designs and SI/PI simulations for DDR, PCIe and other 25Gbps interfaces.

Responsibilities include developing layout guides, reviewing PCB designs, and conducting TDR/VNA-based debugging with hardware measurements to optimize performance. Strong teamwork and hands-on problem solving are essential.