Signal Integrity Engineer — High-Performance AI Compute

Ampere; Santa Clara (CA); Presencial; USD 159.000 - 239.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Health insurance

401K retirement plan

Unlimited flextime and holidays

Descripción de la vacante

Ampere Computing is hiring a Signal Integrity Engineer in Santa Clara, CA. You will work with chip and hardware teams to ensure robust signal integrity and power integrity across high-speed interfaces, DDR and SerDes, and package-to-board interconnect.

You will model, simulate, and validate PI/SI networks using industry-standard tools and engage in documentation of guidelines for internal and external customers. This role requires advanced degrees with several years of relevant experience.

Formación

• Experience in design, simulation, measurement or validation for power integrity or signal integrity.
• Knowledge of interconnect physics for high-speed signaling and power delivery.
• Experience with s-parameter and RLC models using HFSS/PowerSI/PowerDC
• Familiarity with PI/SI simulation methodologies and interconnect modeling.
• IBIS/IBIS-AMI/HSPICE in SI simulations required.

Responsabilidades

• Collaborate with chip and hardware designers to achieve robust SI/PI performance.
• Simulate and analyze end-to-end high-speed DDR I/O and SerDes interfaces.
• Model power delivery networks across Package and PCB.
• Assess channels for high-speed SerDes and DDR including Package, PCB, via, connectors, sockets.
• Develop package-related PCB guidelines and documentation for internal/external use.

Conocimientos

Power integrity

Signal integrity

S-parameter models

IBIS/IBIS-AMI

HSPICE

Electrical interconnect theory

Educación

PhD in Electrical Engineering / Computer Engineering

MS in Electrical Engineering / Computer Engineering

BS in Electrical Engineering / Computer Engineering

Herramientas

Ansys HFSS

PowerSI

PowerDC

IBIS/IBIS-AMI tooling

HSPICE

Descripción del empleo

Ampere Computing is hiring a Signal Integrity Engineer in Santa Clara, CA. You will work with chip and hardware teams to ensure robust signal integrity and power integrity across high-speed interfaces, DDR and SerDes, and package-to-board interconnect.

You will model, simulate, and validate PI/SI networks using industry-standard tools and engage in documentation of guidelines for internal and external customers. This role requires advanced degrees with several years of relevant experience.