Signal Integrity Engineer

Aivres; Fremont (CA); Hybrid; USD 110,000 - 140,000; Full time

Job summary

Aivres in Fremont, California is seeking a Signal Integrity Engineer to join our team. You will work on high-speed interconnect designs and SI/PI simulations for DDR, PCIe and other 25Gbps interfaces.

Responsibilities include developing layout guides, reviewing PCB designs, and conducting TDR/VNA-based debugging with hardware measurements to optimize performance. Strong teamwork and hands-on problem solving are essential.

Qualifications

• Electronics related major with 2+ years of relevant experience; SI experience preferred.
• Familiar with SI theory and high-speed bus protocols such as DDR and PCIe.
• Able to perform TDR, VNA testing and assist in high-speed PCB design docking, debugging and verification.

Responsibilities

• Design high-speed interconnect solutions and simulate SI/PI for buses like DDR, PCIe, 25Gbps and FC.
• Develop layout guides and review high-speed interface PCB designs; assist in backplane and motherboard PCB work.
• Develop high-speed signal debug methods using TDR and VNA, combine software simulation with hardware measurements.
• Monitor industry trends in SERDES, PCB materials, connectors, and output optimization solutions.

Skills

Signal integrity

High-speed PCB

DDR/PCIe knowledge

TDR/VNA testing

Communication & teamwork

Education

Electronics related major

Tools

TDR

VNA

Job description

Aivres is a leading global data center and cloud computing solutions provider committed to delivering innovative technologies that propel the world’s leading industries to new frontiers. We deliver and deploy robust, performance-optimized, purpose-built platforms to major data centers around the globe.

We are looking for a Signal Integrity Engineer to join our Fremont office, CA.

Primary Responsibilities

• Responsible for project high-speed interconnect solution design, develop and implement SI/PI simulation solutions, complete simulation design of signal buses such as DDR, QPI, PCIE, HFI 25Gbps, FC, optical interconnect;
• Develop Layout Guide, participate in high-speed interface PCB design work, provide design guidance and review opinions, assist in completing high-speed backplane and key platform CRB motherboard PCB related design work;
• Develop high-speed signal debug solutions, master passive testing methods such as TDR and VNA, combine software simulation and hardware measurement to complete signal problem localization and optimization;
• Pay attention to industry competitive product trends and server high-speed signal development trends, understand device technology roadmaps such as SERDES, PCB materials, connectors, cables, and output high-speed interconnect optimization solutions and technical suggestions.

Qualifications

• Electronics related major, 2+ years of relevant work experience, SI signal integrity related work experience is preferred;
• Familiar with SI signal integrity basic theoretical knowledge, understand mainstream high-speed bus related protocols and application knowledge such as DDR, PCIE;
• Understand SI/PI simulation basic process, familiar with TDR, VNA and other testing methods, able to cooperate in completing high-speed PCB design docking, debugging and verification and other related work;
• Good communication skills and teamwork spirit, proactive and practical at work, serious and responsible.

EEO Statement

Aivres is an Equal Opportunity Employer and embraces diversity in our employee population. It is the policy of Aivres to provide equal opportunity to all qualified applicants and employees without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, protected veteran status or special disabled veteran, marital status, pregnancy, genetic information, or any other legally protected status.

Details:

• Job Location: Fremont, California, United States