HBM SI/PI Engineer — On/Off-Chip, San Jose

SK hynix America

San Jose (CA)

On-site

USD 150,000 - 320,000

Full time

14 days+

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Benefits offered by this job

Health insurance

Paid time off (PTO)

Paid parental leave

401k Matching

Education reimbursement up to $10,000

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Free Breakfast/Lunch/Dinner

Job summary

SK hynix America in San Jose, CA seeks an On/Off-Chip SI/PI Engineer to serve as a technical liaison between HQ engineering and U.S.-based customers. You will perform hands-on signal and power integrity analyses to address HBM challenges and help develop advanced memory architectures for future DRAM products.

The role requires a BS or higher in Electrical Engineering with 3+ years of SI/PI experience or a related MS/PhD.

Qualifications

BS in Electrical Engineering or related field with 3+ years in SI/PI engineering or MS/PhD with relevant focus.
Understanding of 2.5D/3D IC architectures, modeling and operations.
Hands-on SI/PI analysis including on-/off-chip PDN and high-speed channel analysis.
Proficiency with SI/PI tools: HFSS, SIwave, Sigrity, ADS, HSPICE, etc.

Responsibilities

Strengthen SI/PI capabilities for HBM, next-generation DRAM, and beyond.
Drive system-level co-optimization beyond standalone DRAM design.
Build deep technical partnerships with U.S.-based customers.
Improve competitiveness through close engagement with customers in the U.S.
Perform on-chip and off-chip SI/PI design and analysis for HBM and next-generation DRAM products.
Verify system-level SI/PI robustness through integrated modeling and 3D electromagnetic analysis
Analyze root causes of SI/PI issues and establish improvement plans.
Participate in technical engagements with key customers.
Leverage understanding of DRAM on-chip architecture and its electrical characteristics.