HBM Datapath Architect – High-Bandwidth Memory

Micron Technology, Inc

Richardson (TX)

On-site

USD 146,000 - 297,000

Full time

5 days ago

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Benefits offered by this job

Medical, dental and vision plans

Paid time off

Paid holidays

Job summary

Micron Technology, Inc. is seeking an HBM Datapath Architect to design and optimize high-speed datapaths for next-generation HBM products, collaborating across design, PHY, ECC, verification, layout, and system teams to drive architecture from concept to production.

The role focuses on logic-die and core-die datapath circuitry, aiming for industry-leading bandwidth, power efficiency, reliability, and scalability across JEDEC and custom HBM solutions, with opportunities to influence silicon

Qualifications

7+ years of relevant industry experience in high-speed digital datapath design (memory, SerDes, or SoC datapath).
3+ years of hands-on experience with digital schematic build, RTL, or mixed-signal datapath implementations.

Responsibilities

Architect and design HBM read and write datapath across core and logic die, including alignment, buffering, timing, and control logic.
Develop high-speed, low-latency datapath circuits supporting multi-channel HBM architectures.
Optimize datapath designs for bandwidth, power, area, and timing closure at advanced technology nodes.
Design and integrate data reliability features, including parity, ECC hooks, lane redundancy, and remapping mechanisms.
Collaborate with multi-functional teams to translate specifications into robust micro-architectures.
Drive schematic-level and RTL-level datapath implementations, including clocking, gating, and reset strategies.