Staff Design Architect: High-Speed Datapath (HBM)

Micron Memory Malaysia Sdn Bhd; Richardson (TX); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Medical, dental, vision plans

Paid time off

Paid holidays

Benefits including retirement programs

Job summary

Micron Technology in Richardson, TX seeks a Staff Design Engineer/Architect to define and optimize high-speed datapath circuitry for next-generation HBM products. You will determine system requirements and IO processes, coordinating across design, PHY, ECC, verification, layout, and system groups to ensure seamless integration.

This role emphasizes architectural leadership, complex specification definition, and collaboration across teams to deliver robust performance while leveraging AI to

Qualifications

• Bachelor’s degree in Electrical or Computer Engineering or related field.
• 4+ years of relevant industry experience.
• Experience architecting or optimizing high-speed datapath circuitry.
• Ability to define complex system requirements and I/O processes.
• Experience coordinating subsystem design and system integration.

Responsibilities

• Architect, design, and optimize logic-die and core-die datapath circuitry for next-generation HBM products.
• Determine system specifications, input/output processes, and working parameters for hardware/software compatibility, leveraging AI to enhance analysis and decision-making.
• Coordinate subsystem design and integration across multi-functional teams.
• Identify, analyze, and resolve system or program support deficiencies.
• Develop and recommend corrective actions to ensure robust datapath performance.

Skills

Datapath design

System requirements

Cross-functional coordination

AI-assisted design

Education

Bachelor's in Electrical or Computer Engineering

Job description

Micron Technology in Richardson, TX seeks a Staff Design Engineer/Architect to define and optimize high-speed datapath circuitry for next-generation HBM products. You will determine system requirements and IO processes, coordinating across design, PHY, ECC, verification, layout, and system groups to ensure seamless integration.

This role emphasizes architectural leadership, complex specification definition, and collaboration across teams to deliver robust performance while leveraging AI to