Group Technical Architect - ASIC/SoC & RTL Lead

HCL Technologies Limited; United States; On-site; USD 150,000 - 210,000; Full time

Job summary

HCL Technologies Limited in the United States seeks a Group Technical Architect with 8–14 years of experience to define micro-architecture specifications for high-performance, low-power digital blocks and subsystems, and to oversee full-chip RTL integration. You will lead a team of 5–6 leads, manage two projects concurrently, and interact with clients across geos.

Strong RTL, ASIC/SoC flows, synthesis, timing, and IP integration experience are essential.

Qualifications

• 8–14 years of experience mandatory.
• Experience defining micro-architecture specifications for high-performance, low-power digital blocks and subsystems.
• Experience in full-chip RTL integration.

Responsibilities

• Lead ASIC/SoC development flow including synthesis, timing constraints, and STA closure.
• Resolve P&R congestion issues and optimize RTL performance.
• Integrate IPs like PCIe, DDR, Ethernet, etc., and oversee RTL methodologies.

Skills

Team leadership

RTL Synthesis

Scripting

IP integration (PCIe, DDR, Ethernet)

Client interaction

Communication skills

Tools

RTL Synthesis

Scripting

Job description

HCL Technologies Limited in the United States seeks a Group Technical Architect with 8–14 years of experience to define micro-architecture specifications for high-performance, low-power digital blocks and subsystems, and to oversee full-chip RTL integration. You will lead a team of 5–6 leads, manage two projects concurrently, and interact with clients across geos.

Strong RTL, ASIC/SoC flows, synthesis, timing, and IP integration experience are essential.