GPU Front‑End Integration Engineer — RTL & PPA Innovator

Apple Inc.; Santa Clara (CA); On-site; USD 140,000 - 200,000; Full time

Job summary

Apple seeks a GPU Design Integration Engineer to help design and integrate RTL for next-generation GPU IPs. You will perform RTL integration, partitioning, design analysis, qualification, packaging and delivery, while running LEC between designs and ensuring readiness with lint checks and unit level synthesis.

Collaborating with Architecture, IP, DV, SOC, DFT, and IMPL teams across sites, you will contribute to design unit specifications and pursue innovative methods to streamline front-end

Qualifications

• BS + 3 years of relevant experience.
• Experience with Verilog/SystemVerilog.
• Experience with one of the following scripting languages: Perl/Ruby/Python.

Responsibilities

• RTL integration, partitioning, design analysis, qualification, packaging and delivery.
• Run logic equivalence checking between designs.
• Ensure implementation readiness with RTL lint, custom checks and unit level synthesis.
• Develop innovative methods to improve front‑end design integration process.
• Understand and contribute to specifications for design units.
• Collaborate effectively with Architecture, IP, DV, SOC, DFT, IMPL teams spanning multiple sites.

Skills

Verilog/SystemVerilog

Perl

Python

Ruby

Education

BS in Electrical/Computer Engineering

Tools

Verilog/SystemVerilog Tools

Job description

Apple seeks a GPU Design Integration Engineer to help design and integrate RTL for next-generation GPU IPs. You will perform RTL integration, partitioning, design analysis, qualification, packaging and delivery, while running LEC between designs and ensuring readiness with lint checks and unit level synthesis.

Collaborating with Architecture, IP, DV, SOC, DFT, and IMPL teams across sites, you will contribute to design unit specifications and pursue innovative methods to streamline front-end