GPU Physical Design Engineer — Lead High-Performance ASIC

Apple Inc.; Cupertino (CA); On-site; USD 180,000 - 250,000; Full time

Job summary

Apple Inc. in Cupertino, CA is seeking a senior professional to design and implement next-generation GPU PD flows. You will drive physical design from RTL to tapeout, coordinating with FE teams and leading place-and-route efforts to optimize performance, power and area.

The role involves pioneering PD methodologies, addressing cross-functional design issues, and delivering world-class GPU implementations on cutting-edge technology nodes.

Qualifications

• Experience with industry standard physical Implementation tools and PPA optimization flows.
• Experience with TCL, Perl or Python scripting.
• BS + 10 years of relevant experience.

Responsibilities

• Work closely with FE team to understand chip architecture and drive physical aspects early in design cycle.
• Lead and resolve design and flow issues related to physical design, identify potential solutions and drive execution.
• Be focal point for place and route drive the work among place and route engineers, set goals and breakthroughs, plan short and long-term work.

Skills

PPA optimization

Scripting: TCL/Perl/Python

Education

BS degree + 10 years experience

Tools

ASIC/PD tools

Job description

Apple Inc. in Cupertino, CA is seeking a senior professional to design and implement next-generation GPU PD flows. You will drive physical design from RTL to tapeout, coordinating with FE teams and leading place-and-route efforts to optimize performance, power and area.

The role involves pioneering PD methodologies, addressing cross-functional design issues, and delivering world-class GPU implementations on cutting-edge technology nodes.