Graphics FE Implementation Engineer

Apple Inc.; United States; On-site; USD 140,000 - 210,000; Full time

Job summary

Apple Inc. is seeking an experienced engineer for RTL to netlist generation on Apple Silicon GPUs. You’ll collaborate with RTL and Physical design teams to deliver high‑quality netlists and meet critical milestones.

In this role, you’ll perform linting, CDC and logic‑equivalence checks and support ECO generation activities to drive best‑in‑class GPU performance. The position emphasizes collaboration, strong fundamentals in digital logic, and hands-on use of Verilog/SystemVerilog and RTL tools in

Qualifications

• BS in Electrical Engineering or related field.
• Coursework in Computer Architecture, Digital Logic Design and CMOS VLSI design.
• Experience with scripting languages (Python/Perl/Tcl).

Responsibilities

• RTL to netlist generation in collaboration with the RTL and Physical design teams.
• Deliver key netlist quality milestones for your partition.
• Engage in Lint, CDC, Logic equivalence checks and support ECO generation activities.
• Contribute to delivering best-in-class GPUs for Apple Silicon.

Skills

Digital logic design

Scripting (Python/Perl/Tcl)

Computer architecture

Education

BS in Electrical Engineering or related field

Tools

rtl2gds tools

Synthesis

Place & Route

Static timing analysis

DFT methodologies

Verilog/SystemVerilog

Job description

Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish! Dynamic, resourceful people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.Join the team that optimizes and delivers world-class GPUs into Apple Silicon. As part of the GPU FE Implementation team, you’ll be responsible for crafting and building a GPU that enriches the lives of millions of people every day.

Description

Candidates will be responsible for RTL to netlist generation working collaboratively with the RTL and Physical design teams. You will also deliver key netlist quality milestones for your partition, engage in Lint, CDC, Logic equivalence checks and support ECO generation activities. Through this collaboration, you will deliver the best-in‑class GPU’s for the best consumer products. If you’re ready to help chart the future of Apple Silicon, we’d love to talk to you.

Minimum Qualifications

• Relevant Coursework in Computer Architecture, Digital Logic Design and CMOS VLSI design
• Experience with at least one scripting language (python/perl/tcl)
• BS required

Preferred Qualifications

• Familiarity with Verilog and System Verilog
• Exposure to industry standard rtl2gds tools for synthesis, place and route, static timing analysis
• Exposure to Clock/Reset domain crossing or Voltage crossing principles
• Familiarity with DFT methodologies
• Knowledge of static timing analysis concepts (setup and hold timing)
• Understanding of CMOS device characteristics for area/timing/power tradeoffs

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.

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Apple accepts applications to this posting on an ongoing basis.