Graphics FE Implementation Engineer

Apple Inc.; Austin (TX); On-site; USD 90,000 - 130,000; Full time

Job summary

A leading tech company in Austin, Texas is seeking a candidate to join their team for GPU development. The ideal applicant will engage in RTL to netlist generation, collaborate with design teams, and ensure netlist quality. A Bachelor's degree and experience with scripting languages are required. The company values inclusion and diversity, promoting equal opportunity for all applicants.

Qualifications

• Candidates should have relevant coursework in Computer Architecture, Digital Logic Design and CMOS VLSI design.
• Experience with scripting languages like Python, Perl, or Tcl is required.
• A Bachelor's degree is necessary.

Responsibilities

• Responsible for RTL to netlist generation.
• Collaborate with RTL and Physical design teams.
• Deliver key netlist quality milestones.

Skills

Relevant Coursework in Computer Architecture, Digital Logic Design and CMOS VLSI design

Experience with at least one scripting language (python/perl/tcl)

Education

Bachelor's Degree in relevant field

Tools

Verilog

System Verilog

rtl2gds tools

Job description

Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish! Dynamic, resourceful people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.Join the team that optimizes and delivers world-class GPUs into Apple Silicon. As part of the GPU FE Implementation team, you’ll be responsible for crafting and building a GPU that enriches the lives of millions of people every day.

Description

Candidates will be responsible for RTL to netlist generation working collaboratively with the RTL and Physical design teams. You will also deliver key netlist quality milestones for your partition, engage in Lint, CDC, Logic equivalence checks and support ECO generation activities. Through this collaboration, you will deliver the best-in-class GPU’s for the best consumer products. If you’re ready to help chart the future of Apple Silicon, we’d love to talk to you.

Minimum Qualifications

• Relevant Coursework in Computer Architecture, Digital Logic Design and CMOS VLSI design
• Experience with at least one scripting language (python/perl/tcl)
• BS required

Preferred Qualifications

• Familiarity with Verilog and System Verilog
• Exposure to industry standard rtl2gds tools for synthesis, place and route, static timing analysis
• Exposure to Clock/Reset domain crossing or Voltage crossing principles
• Familiarity with DFT methodologies
• Knowledge of static timing analysis concepts (setup and hold timing)
• Understanding of CMOS device characteristics for area/timing/power tradeoffs

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .

Apple accepts applications to this posting on an ongoing basis.