GPU Front‑End Design Engineer — Drive PPA Excellence

Nutanix; San Diego (CA); On-site; USD 195,000 - 293,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking a Design Implementation Engineer to join the Adreno GPU team and drive front end implementation and PPA improvements. You will work with graphics microarchitecture and physical design to push power, performance, and area targets and support tape-outs with new methodologies.

The role requires deep ASIC frontend experience, RTL synthesis, sub-micron design flow knowledge, and strong collaboration with RTL designers and other teams to optimize GPU cores.

Qualifications

• Bachelor’s degree or higher in Electrical/Computer Engineering or related field.
• 5+ years in front end implementation and physical design.
• Experience with ASIC design flow and sub-micron nodes.
• Strong knowledge of synthesis and timing analysis.
• Experience taping out designs under 10nm or below is a plus.

Responsibilities

• Lead front end implementation and physical design challenges.
• Collaborate with graphics RTL, microarchitecture, and physical design teams.
• Support tape-outs and new flows to meet PPA targets.

Skills

Front end implementation

RTL synthesis

Scripting TCL/Python

Team collaboration

Debugging & analysis

Education

Bachelor’s degree in Electrical/Computer Engineering or related field

Master’s degree in Electrical/Computer Engineering or related field

PhD in Electrical/Computer Engineering or related field

Tools

Synopsys Next Generation tools

Conformal LEC

Synopsys Formality

Synopsys PrimeTime

Place & Route tools

Signoff tools

Job description

Qualcomm Technologies, Inc. is seeking a Design Implementation Engineer to join the Adreno GPU team and drive front end implementation and PPA improvements. You will work with graphics microarchitecture and physical design to push power, performance, and area targets and support tape-outs with new methodologies.

The role requires deep ASIC frontend experience, RTL synthesis, sub-micron design flow knowledge, and strong collaboration with RTL designers and other teams to optimize GPU cores.