GFX/Display IP Digital Design Engineer

Meta; Redmond (WA); On-site; USD 146,000 - 209,000; Full time

Job summary

Meta is seeking highly skilled Design Engineers to join our team. In this role, you will contribute to the development of advanced technology solutions, including machine learning and network acceleration.

You will collaborate with researchers and engineers to design, implement, and optimize low-power hardware accelerators, state-of-the-art SoCs, and custom silicon solutions that enable the next generation of innovative devices and hardware.

Qualifications

• Bachelor’s degree in CS/CE or related field.
• 6+ years of hardware design experience in production silicon.
• Experience with digital µArchitecture, RTL coding, and micro-architecture.
• Ability to communicate design decisions to cross-functional teams.

Responsibilities

• Contribute to ASIC digital µArchitecture and design.
• Assist performance/power analysis to meet targets.
• Map algorithms to hardware and specify IP/subsystem integration requirements.
• Collaborate with Verification, Physical Design, and Design-for-Test.
• Develop micro-architecture, RTL coding, and design verification for IPs.
• Drive IP/sub-system micro-architecture and RTL design with DV/PD leads.

Skills

Digital design

RTL coding

Micro-architecture

Power analysis

IP integration

Education

Bachelor's degree in CS/CE or related field

Tools

Synthesis

Static timing analysis

Python

C/C++

Shell scripting

CDC/RDC analysis

Job description

Summary:

Meta is seeking highly skilled Design Engineers to join our team. In this role, you will contribute to the development of advanced technology solutions, including machine learning and network acceleration. You will collaborate with researchers and engineers to design, implement, and optimize low-power hardware accelerators, state-of-the-art SoCs, and custom silicon solutions that enable the next generation of innovative devices and hardware.

Required Skills:

GFX/Display IP Digital Design Engineer Responsibilities:

1. Contribute to ASIC digital µArchitecture and design
2. Assist performance/power analysis of the design and help meet power and performance targets
3. Work with architects to map algorithms onto the hardware and specify requirements for IP and subsystems integration
4. Collaborate with adjacent teams such as Verification, Physical Design, and Design-for-Test
5. Develop micro-architecture, RTL coding, and design verification for complex IPs
6. Drive IP/sub-system micro-architecture and RTL design in collaboration with DV and PD leads

Minimum Qualifications:

1. Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
2. 6+ years of experience as a Hardware Design Engineer for production silicon shipped in volume
3. Experience in digital design µArchitecture, RTL coding, and micro-architecture development
4. Experience communicating technical design decisions and trade-offs to cross-functional partners such as verification, physical design, and architecture teams

Preferred Qualifications:

1. Experience micro-architecting and designing IP with heavy fixed-point and/or floating-point data path logic
2. Experience with synthesis, static timing analysis, and timing closure methodologies
3. Experience collaborating with verification or physical design teams during the silicon development cycle
4. Experience with microarchitecture and design optimization for power, performance, and area
5. Experience with at least one procedural programming language (C, C++, Python, etc.)
6. Experience with shell scripting (bash and/or csh)
7. Experience with CDC and RDC analysis
8. Experience with pixel processing pipelines like 2D/3D GFX engines and/or display processing units
9. Demonstrated ability to integrate AI tools to optimize/redesign workflows and drive measurable impact (e.g., efficiency gains, quality improvements)
10. Experience adhering to and implementing responsible, ethical AI practices (e.g., risk assessment, bias mitigation, quality and accuracy reviews)
11. Demonstrated ongoing AI skill development (e.g., prompt/context engineering, agent orchestration) and staying current with emerging AI technologies

Public Compensation:

$146,000/year to $209,000/year + bonus + equity + benefits

Industry:

Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affi ...? We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at [e-mail].