ASIC Engineer, Design

Meta; Austin (TX); On-site; USD 178,000 - 250,000; Full time

Benefits offered by this job

Bonus

Equity

Benefits

Job summary

Meta is hiring ASIC Design Engineers to build cutting-edge ASICs for ML, video transcoding, and network acceleration. The role focuses on architecture exploration, micro-architecture development, and IP identification and integration with verification and emulation teams.

Strong RTL skills in Verilog/SystemVerilog and HLS are required. Experience with SoC architectures and expertise in timing closure are highly valued.

Qualifications

• Bachelor's degree or equivalent practical experience in CS/CE or related field.
• 8+ years in micro-architecture and RTL development for complex IPs OR SoC micro-architecture, design and integration.
• RTL development using Verilog, SystemVerilog and HLS.

Responsibilities

• Architecture exploration
• Micro-architecture development
• Soft and hard IP identification, selection and integration with verification/emulation teams
• Collaborate with implementation to meet timing and power targets

Skills

RTL development

Verilog/SystemVerilog

HLS

SoC architecture

Timing closure

IP integration

Education

Bachelor's degree in CS/CE or related field

MS/PhD preferred

Electrical Engineering background

Job description

Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video transcoding and network acceleration.

ASIC Engineer, Design Responsibilities:

• Architecture exploration
• Micro-architecture development
• Soft and hard IP identification, selection and integration. Collaboration with verification and emulation teams in test plan development and debug
• Collaboration with implementation team to close the design on timing and power

Minimum Qualifications:

• Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
• 8+ years of experience in micro-architecture and RTL development for complex control and data path IPs OR Experience in SoC Micro-architecture, Design and Integration
• RTL development using Verilog, System Verilog and HLS

Preferred Qualifications:

• Experience in CPU, NOC, Memory and Peripheral Subsystems
• Experience with Synthesis, Timing Closure and Formal Verification Methodology
• Master’s or PhD degree in Electrical Engineering, Computer Science or related areas
• Experience in data path development

About Meta:

Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.

Meta is proud to be an Equal Employment Opportunity and Affimative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at [e-mail].

$178,000/year to $250,000/year + bonus + equity + benefits

Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.