FPGA Verification Engineer - SystemVerilog

Advanced Micro Devices, Inc.; San Jose (CA); Hybrid; USD 100,000 - 130,000; Full time

Benefits offered by this job

Competitive benefits

Hybrid work model

Job summary

Advanced Micro Devices, Inc. seeks a Verification Engineer in San Jose, CA. In this role, you will ensure the functional correctness of FPGA devices by implementing comprehensive verification strategies. Collaboration with architects and engineers will be key to understanding and verifying new features.

The ideal candidate will have a background in digital design, excellent debugging capabilities, and familiarity with modern verification methodologies.

The company offers a hybrid work model and competitive benefits.

Qualifications

• Strong analytical and debugging skills.
• Effective communication across globally distributed teams.
• Motivated to learn new technologies and own complex problems.

Responsibilities

• Collaborate to verify new features for FPGA devices.
• Build test plan documentation for various interactions.
• Debug test failures with RTL and firmware engineers.

Skills

Debugging firmware and RTL

UVM-based verification environments

SystemVerilog

Python scripting

Automating workflows

Education

Bachelors or Masters degree in computer engineering / Electrical Engineering

Tools

Simulation tools

C++

SystemC

Job description

Advanced Micro Devices, Inc. seeks a Verification Engineer in San Jose, CA. In this role, you will ensure the functional correctness of FPGA devices by implementing comprehensive verification strategies. Collaboration with architects and engineers will be key to understanding and verifying new features.

The ideal candidate will have a background in digital design, excellent debugging capabilities, and familiarity with modern verification methodologies.

The company offers a hybrid work model and competitive benefits.