FPGA Verification Engineer — Onsite in Santa Clara

STI; Santa Clara (CA); On-site; USD 120,000 - 150,000; Full time

Job summary

STI in Santa Clara, CA is seeking a skilled FPGA Verification Engineer to verify complex FPGA designs, develop verification plans, and work with design engineers to ensure quality and performance.

The role requires 3+ years in FPGA verification, strong SystemVerilog and UVM experience, and familiarity with QuestaSim or VCS. This on-site position emphasizes collaboration and rigorous debugging. A Bachelor's or Master's in EE or CE is required.

Qualifications

• Bachelor's or Master's in EE, CE, or related field.
• 3+ years FPGA verification experience.
• Proficiency in SystemVerilog and UVM.
• Experience with QuestaSim or VCS.
• Knowledge of code and functional coverage analysis.
• Strong debugging and problem-solving skills.
• Excellent communication and collaboration.

Responsibilities

• Develop and execute comprehensive verification plans for FPGA designs.
• Create and maintain test benches using UVM and SystemVerilog.
• Write and debug test cases to verify functionality and corner cases.
• Perform code coverage and functional coverage analysis.
• Identify and debug issues with design engineers.
• Document verification results and reports.
• Participate in design reviews and contribute to verification strategy.
• Stay up-to-date with verification methodologies and tools.

Skills

FPGA

SystemVerilog

UVM

QuestaSim

Synopsys VCS

Code Coverage

Debugging

Python

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

VHDL

Verilog

Job description

STI in Santa Clara, CA is seeking a skilled FPGA Verification Engineer to verify complex FPGA designs, develop verification plans, and work with design engineers to ensure quality and performance.

The role requires 3+ years in FPGA verification, strong SystemVerilog and UVM experience, and familiarity with QuestaSim or VCS. This on-site position emphasizes collaboration and rigorous debugging. A Bachelor's or Master's in EE or CE is required.