Formal Verification Intern - Microarchitecture & SystemVerilog

Cirrus Logic, Inc.; Austin (TX); Hybrid; USD 30,000 - 50,000; Full time

Job summary

A leading technology company is seeking a Fall 2026 intern for its Formal Verification team in Austin, TX. Candidates should be enrolled in a Master's or PhD program in Electrical or Computer Engineering. The role involves supporting formal verification methodologies, developing test plans, and improving verification processes. Strong skills in System Verilog and knowledge of scripting languages like Python are essential. Cirrus Logic supports a collaborative work culture with flexible in-office requirements.

Qualifications

• Currently enrolled in a MS or PhD program in Electrical and Computer Engineering.
• Excellent communication skills and a collaborative approach to team work.
• Proficient in designing verification environments for module-level designs.

Responsibilities

• Support the formal verification team with defined methodology practices.
• Develop test plans and verification methodologies.
• Perform failure analysis, coverage analysis, and resolution.
• Implement and improve functional and formal verification.

Skills

System Verilog

Python

Perl

TCL

Bash

UVM or equivalent methodologies

Formal property languages (SVA)

Property-based model-checking

Signal processing fundamentals

Analog or digital design fundamentals

Education

Master’s or PhD degree in Electrical or Computer Engineering

Job description

A leading technology company is seeking a Fall 2026 intern for its Formal Verification team in Austin, TX. Candidates should be enrolled in a Master's or PhD program in Electrical or Computer Engineering. The role involves supporting formal verification methodologies, developing test plans, and improving verification processes. Strong skills in System Verilog and knowledge of scripting languages like Python are essential. Cirrus Logic supports a collaborative work culture with flexible in-office requirements.