Senior Formal Verification Engineer, SoC Security & IPs

Apple Inc.; Austin (TX); On-site; USD 120,000 - 160,000; Full time

Job summary

A leading technology company in Austin is seeking a Formal Verification Engineer to join their Silicon Technologies group. The role involves designing and verifying complex design blocks for SoC, ensuring advanced security features are integrated. Candidates should possess a BS degree and a minimum of 10 years of relevant experience, with hands-on expertise in digital logic design and formal verification techniques. This position offers the opportunity to work with cutting-edge technology and contribute to innovative solutions.

Qualifications

• Minimum 10 years of relevant industry experience in silicon validation software engineering.
• Hands-on experience with VLSI and digital logic design.
• Knowledge of temporal logic assertion-based languages.

Responsibilities

• Develop formal micro-architecture specification with Security Enclave design engineers.
• Craft solutions for modeling security attacks.
• Develop formal verification test plans verifying security requirements.

Skills

Detail oriented approach

Interpersonal skills

Debugging skills

Knowledge of formal verification technologies

Proficiency in scripting languages

Education

BS degree in related field

Tools

EDA formal tools

Job description

A leading technology company in Austin is seeking a Formal Verification Engineer to join their Silicon Technologies group. The role involves designing and verifying complex design blocks for SoC, ensuring advanced security features are integrated. Candidates should possess a BS degree and a minimum of 10 years of relevant experience, with hands-on expertise in digital logic design and formal verification techniques. This position offers the opportunity to work with cutting-edge technology and contribute to innovative solutions.