Emulation & Pre-Silicon Verification Engineer - Equity

Broadcom Inc.; San Jose (CA); Hybrid; USD 69,000 - 110,000; Full time

Job summary

Broadcom Inc. in San Jose is seeking an Emulation Engineer to contribute to pre-silicon verification for networking ASICs.

You will assist in chip-architecture studies, verify designs on emulation platforms, and develop tests using Tcl, Python, and C/C++ for emulation. You will build models for Zebu/Palladium, debug issues, write automation, and collaborate with Architecture, DV, Design, and Software teams to improve verification coverage.

Qualifications

• Bachelor’s degree with 0–2 years in pre-silicon verification or emulation.
• Foundational knowledge of Verilog/SystemVerilog, C/C++, Tcl, Python.
• Willingness to learn emulation platforms (Zebu, Palladium) and high-speed protocols.
• Strong teamwork and communication in a fast-paced environment.

Responsibilities

• Assist in studies of chip architecture to define pre-silicon test plans.
• Verify design using emulation platforms.
• Develop tests in Tcl, ITcl, Python, and C/C++ for emulation.
• Build models and testbenches for emulation platforms (Verilog/SystemVerilog).
• Participate in debugging and root-cause analysis for hardware/software issues.
• Write automation scripts to improve efficiency, reusability and coverage.
• Support maintenance of emulation environments for a global user community.
• Collaborate with Architecture, Micro-Architecture, Design, DV, and Software teams.

Skills

Verilog/SystemVerilog

C/C++

Tcl

Python

Automation scripting

Team collaboration

Communication

Education

Bachelor's degree

Tools

Zebu

Palladium

IXIA/Spirent

PCIe

Job description

Broadcom Inc. in San Jose is seeking an Emulation Engineer to contribute to pre-silicon verification for networking ASICs.

You will assist in chip-architecture studies, verify designs on emulation platforms, and develop tests using Tcl, Python, and C/C++ for emulation. You will build models for Zebu/Palladium, debug issues, write automation, and collaborate with Architecture, DV, Design, and Software teams to improve verification coverage.