DRAM Test Structure Intern: Layout & Verification

Micron; Boise (ID); On-site; USD 28,000 - 41,000; Full time

Benefits offered by this job

Medical, dental, vision plans

Paid time off

Paid holidays

Job summary

Micron Technology is seeking a highly motivated Engineering Intern to join the DRAM Build Enablement and Test Structure Engineering team in Boise, Idaho. You will contribute to the development, layout, verification, and analysis of semiconductor test structures used to characterize advanced DRAM technologies, gaining hands-on experience with industry-leading EDA tools and silicon evaluation techniques.

You will write automation scripts in Python or Tcl to boost engineering efficiency,

Qualifications

• Pursuing a Bachelor's or equivalent in Electrical/Computer/Semiconductor Engineering, Physics, or related field.
• Cannot graduate prior to September 2027.
• Basic understanding of semiconductor devices and circuit fundamentals.
• Experience with coding or scripting languages such as Python, Tcl, or Perl.
• Strong analytical and problem-solving skills.
• Good written and verbal communication skills.

Responsibilities

• Contribute to development and arrangement of semiconductor test structures for DRAM technology nodes.
• Support physical verification activities, including DRC, LVS, and predefined validation.
• Engage in device, process, and test-structure simulations to evaluate build assumptions and correlate with silicon data.
• Develop and analyze test structures for device characterization and technology qualification.
• Apply layout databases and EDA tools to build, modify, and verify data for design-rule compliance.
• Perform data analysis on electrical characterization results and generate technical reports.
• Write automation scripts to increase engineering efficiency.
• Collaborate with cross-functional teams to support project objectives.
• Participate in build reviews and problem-solving related to semiconductor development.
• Document methodologies, results, and guidelines for future projects.

Skills

Python scripting

Tcl scripting

Analytical thinking

Communication skills

Education

Bachelor's or equivalent in Electrical/Computer/Semiconductor Engineering or Physics

Tools

Cadence Virtuoso

Calibre

EDA tools

Job description

Micron Technology is seeking a highly motivated Engineering Intern to join the DRAM Build Enablement and Test Structure Engineering team in Boise, Idaho. You will contribute to the development, layout, verification, and analysis of semiconductor test structures used to characterize advanced DRAM technologies, gaining hands-on experience with industry-leading EDA tools and silicon evaluation techniques.

You will write automation scripts in Python or Tcl to boost engineering efficiency,