DPU Power Architect: Power Modeling & Optimization

Sunnyvale (CA)

On-site

USD 180,000 - 240,000

Full time

4 days ago

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Job summary

Meta is seeking an experienced Power Architect for Infrastructure Silicon in Sunnyvale to drive power modeling, analysis, and architectural power optimization of DPUs. You will influence architecture decisions from early design through RTL/gate-level power analysis and silicon correlation to deliver leading performance-per-watt on data center workloads.

The role focuses on building system-level power models, identifying bottlenecks, and implementing DVFS, power gating, and other power-saving

Qualifications

Experience creating workload-driven power models for architectural analysis.
Ability to abstract power-relevant behaviors from real workloads.
Experience building system-level power models and tracking estimates through RTL/gate-level power.

Responsibilities

Analyze real-world DPU software use cases to identify power bottlenecks.
Build and maintain workload-driven power models and rollups across architectures.
Quantify trade-offs in PPA, focusing on energy-per-transaction and performance-per-watt.
Define and drive power-saving features like DVFS, power gating, and clock gating.
Analyze SoC pipelines and data movement to optimize power vs performance.
Own power budgets and provide inputs to power delivery and thermal teams.
Correlate pre-silicon projections with post-silicon measurements and improve methods.